Abstract
1. Introduction
The good potential of the ultrathin barrier (UTB) AlGaN/GaN heterostructure has been demonstrated in the fabrication of high uniformity GaN-on-Si power devices and integration of peripheral controlling circuits[
Regrowth of n-type GaN on source–drain region is an effective way to reduce Rc to 0.05–0.15 Ω·mm[
To break the RC limit of the uniform-ohmic-recess process, a patterned AlGaN layer structure was proposed on Ti/Al/Ni/Au ohmic contact to a conventional AlGaN/GaN heterostructure[
2. Device fabrication
The schematic cross section of the fabricated CMOS-compatible LPCVD-SiNx/AlGaN/GaN MIS-HEMTs is depicted in Fig. 1(a). The UTB-AlGaN/GaN heterostructure wafer used in this work was grown by metal organic chemical vapor deposition (MOCVD) on a 3-inch Si substrate.
Figure 1.(Color online) (a) Schematic cross section of the fabricated Si-CMOS-compatible GaN MIS-HEMTs utilizing a micro-patterned ohmic recess. (b) SEM image. (c) Line profile of the micro-patterned AlGaN/GaN heterostructure measured by atomic force microscopy (AFM).
The AlGaN barrier consists of a ~1 nm GaN cap, a ~4 nm Al0.25Ga0.75N layer and a ~1 nm AlN interface enhancement layer. The fresh wafers were first cleaned by standard Radio Corporation of America (RCA) treatment, followed by a ~44 nm LPCVD-SiNx deposited immediately at 780 °C. The high deposition temperature ensures compact film quality and good thermal stability of the SiNx film, and moreover provides sufficient thermal budget for the subsequent process[
The Ti/Al/Ti/TiN ohmic metal stack was then sputtered to cover the ohmic contact region by another photolithography with a proper wet treatment of the etched surface. The source-drain ohmic contact was then annealed at 550 °C for 90 s in N2 ambient. Subsequently, a TiN/Ti/Al/Ti/TiN metal stack was sputtered over the LPCVD-SiNx layer to form a MIS-gated structure. The fabricated MIS-HEMTs were finally annealed at 280 °C for 4 min in N2 ambient to further improve the thermal stability of the gate. The gate length LG, gate-to-source LGS, and gate-to-drain distance LGS of the MIS-HEMTs are 2.25, 1.25, and 1.75 μm, respectively.
3. Results and discussion
The transmission line method (TLM) was used for the determination of RC and RSH for the Au-free ohmic contact utilizing a pre-ohmic micro-patterned recess process, as shown in Fig. 2(a). The typical RC of the Au-free ohmic contact is determined to be 0.56 Ω·mm, about one-third of our previous reported value (1.57 Ω·mm) without the micro-patterned ohmic recess[
Figure 2.(a) Linear fit of the fabricated Ti/Al/Ti/TiN ohmic contact resistances versus TLM spacing. (b) Temperature-dependent characteristics:
Temperature-dependent four-probe measurement was conducted from –50 to 200 °C, in an N2 protecting environment, to explore the contact mechanism of the fabricated Au-free ohmic contact (Fig. 2(b)). RC is observed to vary slightly over the temperature range, while RSH increases with the temperature. The latter is due to optical phonon scattering induced by degradation of 2-D electron gas (2DEG) mobility at high temperature (T > ~ 200 K) [
where
and
where A* = 4πm*kB2/h3 is the effective Richardson constant, m* is the effective mass of the tunneling electrons in (Al)GaN, ε is the dielectric constant of (Al)GaN, ФB is Schottky barrier height between (Al)GaN and the ohmic metals, ND is electron carrier concentration, and En is the energy difference between the conduction-band edge and the Fermi level at the AlGaN/GaN interface.
As for the patterned ohmic contact, the TFE fitting yields a Schottky barrier height ФB of 0.31 eV and a ND of 5.5 × 1018 cm–3, in contrast to the value of 0.50 eV and 1.01 × 1019 cm–3 obtained in the un-patterned sample. The lower ФB is due to partial transition of metal/AlGaN to metal/GaN contact because of over-etching of the AlGaN barrier. However, over-etching also results in 2DEG depletion in the micro-patterned region, giving rise to a reduced ND. Further investigation is ongoing to verify the trade-off between ФB and ND and their effects on ρc. Transfer length LT of the fabricated ohmic contacts have also been plotted in Fig. 2(d) with the temperature. The micro-pattern ohmic recess leads to a remarkable reduction of LT in the measured range. And the shorter current flow distance from the metal (semiconductor) to the semiconductor (metal) can be attributed to the larger lateral contact area to collect current.
To shed light on the effect of pattern size on the contact resistance, a survey of state-of-the-art ohmic contacts that adopts a similar pre-ohmic pattern process is summarized in Table 1. It can be observed that whether the AlGaN barrier in the patterned region is partially or fully recessed, the change of LT follows closely with the pattern separation. For instance, LT decreases from 1.45 to 0.35 μm as the separation is reduced from 1.50 (this work) to 0.50 μm[
The pre-ohmic micro-pattered recess process was then implemented in a fabrication of CMOS-compatible LPCVD-SiNx/AlGaN/GaN MIS-HEMTs, with LPCVD-SiNx serving as the gate dielectric. The MIS-HEMTs’ output characteristics are shown in Fig. 3(a). The on-state resistance (RON), as extracted from the linear region of the output curve, composed of ohmic contact resistance 2RC (22.89%), access region resistance Rs + Rd (23.62%) and gate channel resistance RChannel (53.49%), is substantially low owing to the ohmic pattern process. High ON/OFF current ratios (ION/IOFF) are more than 9 × 1010 while low gate leakage (~10–7 mA/mm) is also obtained in transfer measurements (Fig. 3(b)), thanks to the high insulating behavior of the LPCVD-SiNx gate dielectric. Due to the trapping behavior of deep states located at the LPCVD-SiNx/GaN interface, a clockwise threshold voltage (VTH) hysteresis of 0.23 V is observed at a drain bias of 1 V (Fig. 3(b)). A smaller VTH hysteresis, while a relative lower extrinsic transconductance, can be further realized with proper surface treatments[
Figure 3.(Color online) (a) DC output, (b) transfer, and (c) off-state leakage characteristics of the fabricated CMOS-process compatible LPCVD-SiN
4. Conclusion
A pre-ohmic micro-patterned recess process was developed to facilitate low-thermal-budget Au-free ohmic contact to a UTB-AlGaN/GaN heterostructure. The contact mechanism of ohmic-patterned technology on a UTB AlGaN/GaN heterostructure and the relationship between LT and pattern size were revealed. CMOS-process-compatible SiNx/AlGaN/GaN MIS-HEMTs were fabricated with the proposed Au-free ohmic contact and LPCVD-SiNx gate dielectric.
Acknowledgements
This work was supported by National Natural Science Foundation of China under Grant 61822407, Grant 62074161, and Grant 11634002; in part by the Key Research Program of Frontier Sciences, Chinese Academy of Sciences (CAS) under Grant QYZDB-SSW-JSC012; in part by the National Key Research and Development Program of China under Grant 2016YFB0400105 and Grant 2017YFB0403000; in part by the Youth Innovation Promotion Association of CAS; in part by the University of Chinese Academy of Sciences; and in part by the Opening Project of Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, CAS.
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