Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors

Shuxin Tan; Takashi Egawa

doi:10.1088/1674-4926/40/4/042801

Abstract

AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) on a silicon substrate were fabricated with silicon oxide as a gate dielectric by sputtering deposition and electron-beam (EB) evaporation. It was found that the oxide deposition method and conditions have great influences on the electrical properties of HEMTs. The low sputtering temperature or oxygen introduction at higher temperature results in a positive equivalent charge density at the oxide/AlGaN interface (N_equ), which induces a negative shift of threshold voltage and an increase in both sheet electron density (n_s) and drain current density (I_D). Contrarily, EB deposition makes a negative N_equ, resulting in reduced n_s and I_D. Besides, the maximum transconductance (g_m-max) decreases and the off-state gate current density (I_G-off) increases for oxides at lower sputtering temperature compared with that at higher temperature, possibly due to a more serious sputter-induced damage and much larger N_equ at lower sputtering temperature. At high sputtering temperature, I_G-off decreases by two orders of magnitude compared to that without oxygen, which indicates that oxygen introduction and partial pressure depression of argon decreases the sputter-induced damage significantly. I_G-off for EB-evaporated samples is lower by orders of magnitude than that of sputtered ones, possibly attributed to the lower damage of EB evaporation to the barrier layer surface.

1. Introduction

GaN and AlN alloys are good choices for the fabrication of optoelectronics and electronic devices, such as light-emitting diodes, ultraviolet detectors, and high-power and high-frequency electronic devices, due to their excellent material properties^[1–9]. These applications lead to a huge market, which provides a strong impetus for research. By using superior material features, such as a large bandgap, high breakdown field, high electron mobility and large two-dimensional electron gas (2DEG) density, the AlGaN/GaN based high-electron-mobility transistor (HEMT) has been identified to be the most promising candidate for high-power and high-frequency applications. However, the facilitation of sufficient positive gate voltage swings and suppression of leakage current for the HEMTs are tasks still to be solved. Metal–insulator–semiconductor (MIS) structure is an attractive alternative to the conventional Schottky gate contact to solve the problems. Although numerous insulators, such as SiO₂, Al₂O₃, HfO₂, MgO, Ta₂O₅, Sc₂O₃, ZrO₂, AlN and Si₃N₄ have been studied as the gate dielectric for GaN-based HEMTs^[10–24], silicon oxide remains popular due to its large band gap (~9 eV), large conduction band discontinuity (~3 eV) and high critical breakdown electric field (~ 15 MV/cm) in comparison with other gate insulators typically used^{[23, 24]}. In addition, it is already consolidated in the Si-devices industry, and it is also applied to depress the dark current of GaN-based ultraviolet detectors^[25]. A different quality of insulator and interface state of insulator/semiconductor could be obtained by different deposition techniques and deposition conditions, which strongly impact the electrical performance of the devices^{[22, 26]}. Sputtering deposition and electron beam (EB) evaporation are nowadays well established as two important techniques for the preparation of thin silicon oxide films. Their advantages include lower deposition temperature and equipment cost, and secure working atmosphere without using the toxic metal–organic precursors and ammonia^[27]. In addition, sputtering deposition can form thin films with good uniformity and good adhesion to the substrate surface without involving the complications of the target heating process^[28]. In this work, we fabricated the MIS-HEMTs using sputtered and electron-beam evaporated silicon oxide as gate dielectric, and investigated the performance of devices under different deposition techniques and sputtering conditions.

2. Experimental

The HEMT structure consisted of unintentionally doped-Al_0.26Ga_0.74N (25 nm)/unintentionally doped-GaN (1 μm)/super lattices (GaN/AlGaN)/buffer layer (AlGaN/AlN) grown by metal organic chemical vapor deposition (MOCVD) on a 4-inch silicon substrate. The fabrication of HEMTs and two-terminal circular diodes for capacitance–voltage (C–V) measurement started with device isolation by BCl₃ plasma reactive ion etching. Then silicon oxide was deposited by different deposition techniques and deposition conditions. After etching the silicon oxide with buffered HF solution, the ohmic contact was formed using Ti/Al/Ni/Au (15/72/12/40 nm) followed by rapid thermal annealing at 850 °C for 30 s in a N₂ atmosphere. The Ni/Ti/Au (40/20/60 nm) was deposited on silicon oxide as a gate electrode. Several samples have been fabricated in terms of oxide deposition. Oxides for samples A and B were deposited with similar thickness by RF sputter at room temperature (RT) and 150 °C, respectively, under Ar atmosphere. Oxides for samples C and D were deposited by RF sputter at 150 °C under Ar and Ar/O₂ atmosphere (Ar : O₂ = 1 : 1), respectively. The difference of sample B and sample C was the oxide thickness. Oxide for sample E was deposited by electron-beam evaporation at 150 °C under oxygen atmosphere. Oxides for samples C, D and E have a similar thickness. The target for sputter is silicon oxide. The gate length and width for HEMT devices is 1.5 and 15 μm, respectively. In order to calculate the carrier density and oxide thickness, Schottky diodes without silicon oxide for capacitance–voltage (C–V) measurement were also fabricated. The current–voltage (I–V) characteristics were measured on an Agilent 4156c semiconductor parameter analyzer. Capacitance–voltage (C–V) measurement was carried out using an HP4845 LCR meter.

3. Results and discussion

C–V characteristics for all the diodes at 1 MHz are shown in Fig. 1. The thicknesses of silicon oxide films for samples A to E were estimated to be around 11, 10, 3.8, 4.0 and 4.0 nm, respectively, based on the formula,

Figure 1.(Color online) C–V characteristics at 1 MHz for all the diodes.

$ {d_{{\rm{ins}}}} = {\varepsilon _{{\rm{ins}}}}{\varepsilon_{\rm{o}}}(1/{C_{{\rm{MIS}}}} - {\rm{ }}1/{C_{{\rm{AlGaN}}}}), $  (1)

where d_ins is the thickness of silicon oxide, ε_ins is the relative dielectric permittivity of silicon oxide taken as 3.9, ε_o is the dielectric permittivity of a vacuum, and C_MIS and C_AlGaN are the unit-area capacitances of the MIS-diodes and the Schottky diode at 0 V, respectively. From C–V curves, the sheet carrier density (n_s) could be estimated according to the expression,

${n_{\rm{s}}} = \mathop \smallint \nolimits_{{V_{{\rm{th}}}}}^0 C{\rm{d}}V, $  (2)

where V_th is defined as the gate voltage at which the GaN buffer is depleted in the C–V curve. The n_s were calculated to be 1.2 × 10¹³, 6.4 × 10¹², 6.3 × 10¹², 7.0 × 10¹², 3.6 × 10¹² and 5.1 × 10¹² cm⁻² for samples A to E and Schottky diode, respectively. Considering the very low electron concentration in the GaN buffer compared with the electron density of 2DEG in channel and neglecting the interface states due to high-frequency (HF) capacitance, n_s could be regarded as the electron density of 2DEG. It should be noticed that n_s in sample A was more than twice of that in the Schottky diode, while sample E reduced 30% compared with the Schottky diode. According to Poisson’s equation and the Schrödinger equation, n_s for 2DEG can be expressed as

$n_{\rm{s}}^{{\rm{Schottky}}} = \frac{{{\sigma _{\rm{p}}}}}{q} - \frac{{{C_{{\rm{AlGaN}}}}\left( {{\phi _{\rm{b}}} - \frac{{\Delta {E_{\rm{c}}}}}{q} + \frac{{\Delta E_{\rm{F}}^{{\rm{Schottky}}}}}{{{q}}} - {V_{\rm{G}}}} \right)}}{q},$  (3)

for Schottky HEMTs, and

$ \begin{split} &n_{\rm{s}}^{{\rm{MIS}}} = \frac{\sigma _{\rm{p}}}{q} -\\ &C_{\rm{MIS}}\frac{{ {\phi _{\rm{b}}^{\rm{'}} - \frac{{\Delta E_{\rm{c}}^{{\rm{ins}}}}}{q} - {\rm{}}\frac{{\Delta {E_{\rm{c}}}}}{q} + \frac{{\Delta E_{\rm{F}}^{{\rm{MIS}}}}}{q} - {V_{\rm{G}}}} }}{{{q}}} + {C_{{\rm{MIS}}}}\frac{{q{N_{{\rm{equ}}}}}}{{{C_{{\rm{ins}}}}}}, \end{split}$  (4)

for MIS-diode, where and are the barrier height for Ni/Al_0.26Ga_0.74N and Ni/SiO₂, taken as 0.9 V (obtained from the current-voltage curve of the Schottky diode) and 3.6 V^[29], respectively. and E_C are conduction band discontinuity taken as 3.1 and 0.3 eV for SiO₂/Al_0.26GaN and Al_0.26GaN/GaN, respectively. C_MIS, C_ins and C_AlGaN are capacitance per unit of MIS-diode, oxide and Schottky diode, respectively. σ_p is the total polarization sheet charge density. V_G is applied to gate bias. qN_equ is defined as the equivalent charge density at the oxide/AlGaN interface, which includes the oxide/barrier interface trap (N_it) and interfical fixed charge at the oxide/AlGaN interface (Q_if) (including the polarization charge at the surface AlGaN barrier, the ionized donor density at AlGaN barrier surface and the fixed charge density of the silicon oxide at the oxide/barrier interface), as well as the equivalent charge density at the AlGaN/GaN interface generated by the charge density in oxide bulk (Q_bulk). and is the Fermi level with respect to the GaN conduction-band-edge energy at the AlGaN/GaN interface for Schottky HEMT and MIS-HEMT, respectively, and is expressed as^[30]

$\Delta{E_{\rm{F}}} = {E_1} + \frac{{\pi {\hbar ^2}}}{{{m^*}}}{n_{\rm{s}}}, $  (5)

${E_1} = {\left( {\frac{{9 \pi \hbar {q^2}}}{{8\sqrt {8{m^*}} {\varepsilon _0}\varepsilon }}{n_{\rm{s}}}} \right)^{2/3}}, $  (6)

where m^* is the electron effective mass of GaN and taken as 0.22m₀ (m₀ is the free electron mass). Therefore,

$\begin{split} n_{\rm{s}}^{{\rm{MIS}}} =\;\,& n_{\rm{s}}^{{\rm{Schottky}}} + \frac{{{C_{{\rm{AlGaN}}}}\left( {{\phi _{\rm{b}}} - \frac{{\Delta {E_{\rm{c}}}}}{q} + \frac{{\Delta E_{\rm{F}}^{{\rm{Schottky}}}}}{q} - {V_{\rm{G}}}} \right)}}{{{q}}}\\ & -{C_{{\rm{MIS}}}}\frac{{ {\phi _{\rm{b}}^{\rm{'}} - \frac{{\Delta E_{\rm{c}}^{{\rm{ins}}}}}{q} - {\rm{}}\frac{{\Delta {E_c}}}{q} + \frac{{\Delta E_{\rm{F}}^{{\rm{MIS}}}}}{q} - {V_{\rm{G}}}} }}{{{q}}} \\ &+ {C_{{\rm{MIS}}}}\frac{{q{N_{{\rm{equ}}}}}}{{{C_{{\rm{ins}}}}}}. \end{split}$  (7)

Considering of 5.1 × 10¹² cm⁻², at gate bias 0 V could be estimated as 6.5 × 10¹² cm⁻² for samples A and B and 6.2 × 10¹² cm⁻² for samples C to E, assuming N_equ is zero in MIS-diodes. Compared with the calculated value without N_equ, n_s obtained from C–V curves for sample A almost doubled and for sample D rised slightly, while for sample E it decreased to nearly half. This indicated that N_equ for sample A and D was positive, which increased the n_s. N_equ for EB-oxide (sample E) was negative, which reduced n_s. For samples B and C, the experimental value was very close to the calculated one, indicating that N_equ could be negligible. According to Eq. (7), N_equ could be estimated as 1.0 × 10¹³ and 2.8 × 10¹² cm⁻² for samples A and D, respectively, with positive charge and 8.8 × 10¹² cm⁻² for sample E with negative charge. That is, for sputtered samples, lower temperature or high temperature with oxygen introduction will resulte in positive N_equ. If N_it could be negeligible due to hf capacitance, Q_if and/or Q_bulk should be the main contribution to N_equ. Hence, the contribution of Q_if and Q_bulk could be ignored for the case of samples B and C due to negligible N_equ estimated above. Threshold voltage (V_th) could also be extracted for samples A to E and the Schottky diode from C–V measurements as −14.5, −7.8, −4.5, −4.9, −3.0 and −2.8 V, respectively, defined as the gate voltage at which the GaN buffer is depleted. Obviously, due to its larger positive charged N_equ, sample A showed a negative shift of V_th compared with sample B though their oxide thicknesses were similar. For the samples with similar oxide thickness, samples D and E showed negative and positive shift of V_th relative to sample C, due to the positive and negative charged N_equ in comparison with sample C, respectively.

Fig. 2 shows the drain current–drain voltage (I_D–V_D) curves and transfer characteristics for all the HEMTs. From Figs. 2(a) and 2(b), the drain current density for sample A was larger than that of sample B at the same gate voltage, which was due to larger n_s for sample A. The maximum current density (I_D-max) for samples A and B were 1323 and 1008 mA/mm, respectively, at the maximum applied gate voltage of 5.5 V. The maximum transconductance (g_m-max) for sample A and B were 77 and 90 mS/mm, respectively. The lower g_m-max of sample A indicated that the mobility is lower compared with that of sample B, which is possibly because of electron scattering enhancement for sample A due to the highest electron density (exceeded 10¹³ cm⁻² in 2DEG), the remote coulombic scattering enhancement by much more positive interfacial charge and higher sputtered-induced damage in the sputtering process for sample A^[31]. The output characteristics and transfer characteristics for samples C, D and E were shown in Figs. 2(c) and 2(d). The I_D for sample C was smaller than that of sample D, but larger than that of sample E at the same gate voltage, which was due to the N_equ-induced similar change trends of n_s. For example, the I_D-max for samples D, C and E were 1027, 933 and 812 mA/mm at the applied gate voltage of 3.5 V, respectively. The g_m-max for samples C, D and E were 132, 147 and 160 mS/mm, respectively. The highest g_m-max of sample E indicated that the mobility is highest among the three samples, which is possibly because, for sample E, the low electron density and no sputtering-induced surface damage^[32] suppress the electron scattering.

Figure 2.(Color online) (a) The output characteristics and (b) the transfer characteristics for samples A and B. (c) The output characteristics and (d) the transfer characteristics for samples C, D and E.

Figs. 3(a) and 3(b) showed the drain current–gate voltage (I_D–V_G) curves and three-terminal gate current density on a semi-logarithmic scale. It can be seen that the off-state gate current density (I_G-off) is larger than the off-state drain current density (I_D-off), which indicates I_D-off is a branch of I_G-off for all HEMT devices within the gate voltage sweeping range. Considering the difference of I_G-off between the devices is several orders of magnitude and much larger than the difference of I_D-max, the I_D-on/I_D-off ratio mainly depends on I_G-off. We compared the I_G-off value taken at the turn-around point in a logarithmic I_D–V_G curve. I_G-off on the order of 10 mA/mm for sample A is more than one order of magnitude larger than that of sample B (10⁻¹ mA/mm), which is possibly due to the higher sputter-induced shallow donor-like N vacancies^[32–34] and much more N_equ for oxide deposited at lower substrate temperature. I_G-off for sample C is in the order of 10⁻² mA/mm, which is also one order of magnitude larger than that for sample D (10⁻³ mA/mm). This inferred that the reduced Ar partial pressure and oxygen introduction could lead to lower sputter-induced N vacancies, which may be ascribed to the energy bombarded on the surface of the barrier layer being reduced because of the smaller atomic mass of O than Ar. In all the samples with sputtered oxides, the I_G-off is orders of magnitude larger than that of sample E with EB-evaporated oxide (10⁻⁴ mA/mm), which suggested that the surface damage of the barrier layer by EB deposition was low and the carrier tunneling was suppressed by oxide.

Figure 3.(Color online) The I_D–V_G curves and three-terminal gate current density (I_G) in semi-logarithmic scale for (a) samples A and B and (b) samples C, D and E.

4. Conclusions

In this paper, AlGaN/GaN based MIS-HEMTs were fabricated using EB-evaporated and sputtered silicon oxide as dielectric. It was found that the electrical properties were influenced by oxide deposition techniques and deposit condition. The high n_s and high drain current density as well as high gate leakage could be achieved using silicon oxide as the gate dielectric by RF-sputtering deposition at room temperature, while low n_s, positive shift of V_th and low gate leakage could be obtained using EB-evaporated oxide as the gate dielectric. That is, there is a tradeoff among the deposition methods and deposition conditions for the HEMT devices to achieve appropriate electrical properities.

Acknowledgements

This work was partly supported by the National Science Foundation of China (No. 61504071).

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