Abstract
1. Introduction
GaN and AlN alloys are good choices for the fabrication of optoelectronics and electronic devices, such as light-emitting diodes, ultraviolet detectors, and high-power and high-frequency electronic devices, due to their excellent material properties[
2. Experimental
The HEMT structure consisted of unintentionally doped-Al0.26Ga0.74N (25 nm)/unintentionally doped-GaN (1 μm)/super lattices (GaN/AlGaN)/buffer layer (AlGaN/AlN) grown by metal organic chemical vapor deposition (MOCVD) on a 4-inch silicon substrate. The fabrication of HEMTs and two-terminal circular diodes for capacitance–voltage (C–V) measurement started with device isolation by BCl3 plasma reactive ion etching. Then silicon oxide was deposited by different deposition techniques and deposition conditions. After etching the silicon oxide with buffered HF solution, the ohmic contact was formed using Ti/Al/Ni/Au (15/72/12/40 nm) followed by rapid thermal annealing at 850 °C for 30 s in a N2 atmosphere. The Ni/Ti/Au (40/20/60 nm) was deposited on silicon oxide as a gate electrode. Several samples have been fabricated in terms of oxide deposition. Oxides for samples A and B were deposited with similar thickness by RF sputter at room temperature (RT) and 150 °C, respectively, under Ar atmosphere. Oxides for samples C and D were deposited by RF sputter at 150 °C under Ar and Ar/O2 atmosphere (Ar : O2 = 1 : 1), respectively. The difference of sample B and sample C was the oxide thickness. Oxide for sample E was deposited by electron-beam evaporation at 150 °C under oxygen atmosphere. Oxides for samples C, D and E have a similar thickness. The target for sputter is silicon oxide. The gate length and width for HEMT devices is 1.5 and 15 μm, respectively. In order to calculate the carrier density and oxide thickness, Schottky diodes without silicon oxide for capacitance–voltage (C–V) measurement were also fabricated. The current–voltage (I–V) characteristics were measured on an Agilent 4156c semiconductor parameter analyzer. Capacitance–voltage (C–V) measurement was carried out using an HP4845 LCR meter.
3. Results and discussion
C–V characteristics for all the diodes at 1 MHz are shown in Fig. 1. The thicknesses of silicon oxide films for samples A to E were estimated to be around 11, 10, 3.8, 4.0 and 4.0 nm, respectively, based on the formula,
Figure 1.(Color online)
where dins is the thickness of silicon oxide, εins is the relative dielectric permittivity of silicon oxide taken as 3.9, εo is the dielectric permittivity of a vacuum, and CMIS and CAlGaN are the unit-area capacitances of the MIS-diodes and the Schottky diode at 0 V, respectively. From C–V curves, the sheet carrier density (ns) could be estimated according to the expression,
where Vth is defined as the gate voltage at which the GaN buffer is depleted in the C–V curve. The ns were calculated to be 1.2 × 1013, 6.4 × 1012, 6.3 × 1012, 7.0 × 1012, 3.6 × 1012 and 5.1 × 1012 cm−2 for samples A to E and Schottky diode, respectively. Considering the very low electron concentration in the GaN buffer compared with the electron density of 2DEG in channel and neglecting the interface states due to high-frequency (HF) capacitance, ns could be regarded as the electron density of 2DEG. It should be noticed that ns in sample A was more than twice of that in the Schottky diode, while sample E reduced 30% compared with the Schottky diode. According to Poisson’s equation and the Schrödinger equation, ns for 2DEG can be expressed as
for Schottky HEMTs, and
for MIS-diode, where
where m* is the electron effective mass of GaN and taken as 0.22m0 (m0 is the free electron mass). Therefore,
Considering
Fig. 2 shows the drain current–drain voltage (ID–VD) curves and transfer characteristics for all the HEMTs. From Figs. 2(a) and 2(b), the drain current density for sample A was larger than that of sample B at the same gate voltage, which was due to larger ns for sample A. The maximum current density (ID-max) for samples A and B were 1323 and 1008 mA/mm, respectively, at the maximum applied gate voltage of 5.5 V. The maximum transconductance (gm-max) for sample A and B were 77 and 90 mS/mm, respectively. The lower gm-max of sample A indicated that the mobility is lower compared with that of sample B, which is possibly because of electron scattering enhancement for sample A due to the highest electron density (exceeded 1013 cm−2 in 2DEG), the remote coulombic scattering enhancement by much more positive interfacial charge and higher sputtered-induced damage in the sputtering process for sample A[
Figure 2.(Color online) (a) The output characteristics and (b) the transfer characteristics for samples A and B. (c) The output characteristics and (d) the transfer characteristics for samples C, D and E.
Figs. 3(a) and 3(b) showed the drain current–gate voltage (ID–VG) curves and three-terminal gate current density on a semi-logarithmic scale. It can be seen that the off-state gate current density (IG-off) is larger than the off-state drain current density (ID-off), which indicates ID-off is a branch of IG-off for all HEMT devices within the gate voltage sweeping range. Considering the difference of IG-off between the devices is several orders of magnitude and much larger than the difference of ID-max, the ID-on/ID-off ratio mainly depends on IG-off. We compared the IG-off value taken at the turn-around point in a logarithmic ID–VG curve. IG-off on the order of 10 mA/mm for sample A is more than one order of magnitude larger than that of sample B (10−1 mA/mm), which is possibly due to the higher sputter-induced shallow donor-like N vacancies[
Figure 3.(Color online) The
4. Conclusions
In this paper, AlGaN/GaN based MIS-HEMTs were fabricated using EB-evaporated and sputtered silicon oxide as dielectric. It was found that the electrical properties were influenced by oxide deposition techniques and deposit condition. The high ns and high drain current density as well as high gate leakage could be achieved using silicon oxide as the gate dielectric by RF-sputtering deposition at room temperature, while low ns, positive shift of Vth and low gate leakage could be obtained using EB-evaporated oxide as the gate dielectric. That is, there is a tradeoff among the deposition methods and deposition conditions for the HEMT devices to achieve appropriate electrical properities.
Acknowledgements
This work was partly supported by the National Science Foundation of China (No. 61504071).
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