• Journal of Semiconductors
  • Vol. 41, Issue 7, 072905 (2020)
Xinyu Wu1、2, Weihua Han1、2, Xiaosong Zhao1、2, Yangyan Guo1、2, Xiaodi Zhang1、2, and Fuhua Yang1、2、3
Author Affiliations
  • 1School of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China
  • 2Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 3State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
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    DOI: 10.1088/1674-4926/41/7/072905 Cite this Article
    Xinyu Wu, Weihua Han, Xiaosong Zhao, Yangyan Guo, Xiaodi Zhang, Fuhua Yang. Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors[J]. Journal of Semiconductors, 2020, 41(7): 072905 Copy Citation Text show less

    Abstract

    We investigate gate-regulated transition temperatures for electron hopping behaviours through discrete ionized dopant atoms in silicon junctionless nanowire transistors. We demonstrate that the localization length of the wave function in the spatial distribution is able to be manipulated by the gate electric field. The transition temperatures regulated as the function of the localization length and the density of states near the Fermi energy level allow us to understand the electron hopping behaviours under the influence of thermal activation energy and Coulomb interaction energy. This is useful for future quantum information processing by single dopant atoms in silicon.
    $G = {G_0}{\rm{exp}}{\left( { - {T_0}/T} \right)^x}.$ (1)

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    $x = 1/4,\;{T_0} \equiv {T_{\rm{M}}} = 21/g\left( {{E_{\rm{F}}}} \right)a_{\rm{M}}^3,$ (2)

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    $x = 1/2,\;{T_0} \equiv {T_{{\rm{ES}}}} = 2.8{e^2}/\kappa {a_{{\rm{ES}}}},\;\kappa = 4\pi {\varepsilon _0}{\varepsilon _{\rm{r}}},$ (3)

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    Xinyu Wu, Weihua Han, Xiaosong Zhao, Yangyan Guo, Xiaodi Zhang, Fuhua Yang. Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors[J]. Journal of Semiconductors, 2020, 41(7): 072905
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