Fig. 1. IRDS advanced technology node development roadmap^［11］

Fig. 2. Schematic and corresponding SEM images of block copolymer-directed self-assembly based on chemical epitaxy and physical epitaxy ^[17]

Fig. 3. DSA of layered phase PS-b-PMMA in guiding templates modified by different random copolymers. (a) Schematic diagram; (b) corresponding SEM images^[33]

Fig. 4. Schematic diagram and corresponding SEM images of block copolymer-directed self-assembly prepared by physical epitaxy based on 193 nm exposure ^[34]

Fig. 5. Schematic of DSA lithography technology based on “LiNe flow” method ^[37]

Fig. 6. Influence of exposure dose on pattern quality before and after transfer in wet etching process with acetic acid as developer and SEM images corresponding to different exposure doses ^[48]

Fig. 7. Schematic of the self-aligned pre-patterning process route. (a) Chemical guiding pattern; (b) DSA process; (c) O₂ etching process; (d) SEM image of pattern transfer process and corresponding process ^[56]

Fig. 8. Types of patterns required for chip design and patterns demonstrated by DSA lithography ^[59]

Fig. 9. Evolution of defect density in DSA lithography process ^[69]

Fig. 10. Self-healing capability of DSA lithography for defects of templates^[71]

Fig. 11. Comparison of production costs and processing steps of DSA and SAQP Baseline^[20]

Fig. 12. Parameter index spider charts for different lithography techniques ^[16]

Fig. 13. Schematic diagram of different fabrication stages of FinFET devices based on DSA lithography^[20]. (a) Cross-sectional image of etched Si fins; (b) customized fins filled with isolation oxide; (c) dummy gate formation; (d) SEM image of merged source and drain; (e) dummy gate removal and channel exposure; (f) schematic of corresponding three-dimensional structures

Table 1. Chip manufacturing technology nodes of different semiconductor manufacturers andtheir corresponding pattern sizes

Table 2. Performances and parameters of various lithography techniques^[16]