Kyuhyun Cha, Kwangsoo Kim. 3.3 kV 4H-SiC DMOSFET with a source-contacted dummy gate for high-frequency applications[J]. Journal of Semiconductors, 2021, 42(6): 062801
- Journal of Semiconductors
- Vol. 42, Issue 6, 062801 (2021)
Fig. 1. (Color online) Schematic cross-sectional structure of (a) C-MOSFET, (b) CI-MOSFET, and (c) DG-MOSFET.
Fig. 2. (Color online) Proposed key fabrication process flow of DG-MOSFET. (a) Ion implantation to form the p-well and n+ source. (b) Dummy etching. (c) Dummy oxide deposition. (d) Nitride mask removal & poly-Si deposition. (e) Poly-Si etchback. (f) Gate oxidation and patterning.
Fig. 3. (Color online) Influences of W JF and N JF of C-MOSFET. (a) The trade-off between R ON and BV and (b) R ON and E MOX (E MOX was measured at V DS = 3300 V.).
Fig. 4. (Color online) Changes of FOM according to W JF and N JF of C-MOSFET.
Fig. 5. (Color online) The trade-off between R ON and BV as variation of W CI and D CI.
Fig. 6. (Color online) FOM as a variation of W CI and D CI.
Fig. 7. (Color online) Influences of W DG and D DG of DG-MOSFET. (a) Trade-off between R ON and BV and (b) R ON and E MOX (E MOX was measured at V DS = 3300 V.).
Fig. 8. (Color online) Electric field distribution of three structures at V DS = 3300 V. (a) C-MOSFET. (b) CI-MOSFET. (c) DG-MOSFET.
Fig. 9. (Color online) Static characteristics of three structures.
Fig. 10. (Color online) Input and Gate-Drain capacitance of three structures.
Fig. 11. (Color online) Gate-drain charge curve of three structures.
Fig. 12. (Color online) (a) Turn off and (b) turn on transient of the three structures.
Fig. 13. (a) Buck converter and (b) boost converter circuit used in the power loss simulation.
Fig. 14. (Color online) Switching power loss in the power circuit. (a) Buck converter. (b) Boost converter.
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Table 1. Static characteristics of the optimized three structures.
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Table 2. Capacitance and gate charge values of the three structures.
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Table 3. Double-pulse test simulation results.
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Table 4. Power simulation results (f = 500 kHz).
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