• Journal of Semiconductors
  • Vol. 43, Issue 10, 104102 (2022)
Lijuan Wu*, Shaolian Su*, Xing Chen*, Jinsheng Zeng*, and Haifeng Wu*
Author Affiliations
  • Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering, School of Physics & Electronic Science, Changsha University of Science & Technology, Changsha 410114, China
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    DOI: 10.1088/1674-4926/43/10/104102 Cite this Article
    Lijuan Wu, Shaolian Su, Xing Chen, Jinsheng Zeng, Haifeng Wu. A deep trench super-junction LDMOS with double charge compensation layer[J]. Journal of Semiconductors, 2022, 43(10): 104102 Copy Citation Text show less
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    [20] L J Wu, Q L Ding, J Q Chen. Improved deep trench super-junction LDMOS breakdown voltage by shielded silicon-insulator-silicon capacitor. Silicon, 13, 3441(2021).

    [21] W Z Chen, L J He, Z S Han et al. The simulation study of the SOI trench LDMOS with lateral super junction. IEEE J Electron Devices Soc, 6, 708(2018).

    Lijuan Wu, Shaolian Su, Xing Chen, Jinsheng Zeng, Haifeng Wu. A deep trench super-junction LDMOS with double charge compensation layer[J]. Journal of Semiconductors, 2022, 43(10): 104102
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