Data traffic has grown tremendously over the past few decades due to emerging applications, such as virtual reality (VR), the internet of things (IoT), artificial intelligence (AI), and cloud computing. The rapid and unceasing growth of data communication leads to a strong demand for higher bandwidth. However, the ever-increasing data rate inside the data centers and high-performance computers (HPCs) has outstripped the capacity of traditional copper interconnects in terms of bandwidth, power efficiency, and crosstalk. Optical interconnects have been widely deployed for reach longer than a couple meters to alleviate the bottleneck of traditional copper wires due to their much larger bandwidth and negligible optical loss in present intra- and inter-data center applications. Recently, silicon photonics (SiPh) technology has drawn significant interest as a promising photonic integrated circuit (PIC) platform compatible to and benefited from the advanced complementary metal–oxide–semiconductor (CMOS) technology. Indeed, the economic benefits of high-volume manufacturing makes low-cost SiPh PICs appealing, thus promisingly cheap and high-performance optical interconnects. While SiPh is an ideal platform from many material and fabrication perspectives, the bandgap of silicon (Si), ~ 1.12 eV, leads to a transparent absorption window across telecommunication wavelengths of 1310 and 1550 nm, making silicon itself a poor optical receiver. The optical receiver (Rx) is an indispensable part of optical interconnects, a high-speed, high-sensitivity Rx can improve the performance of the whole link and reduce the requirements of other active and passive key components. Many works have been done to realize a high-performance photodiodes (PDs) on Si^[1], including germanium (Ge) p–i–n PDs^{[2, 3]}, Ge traveling-wave PDs^{[4, 5]}, heterogeneously integrated III–V p–i–n and uni-traveling carrier (UTC) PDs^{[6, 7]}, heteroepitaxy III–V p–i–n and UTC PDs^{[8, 9]}, metal–semiconductor–metal (MSM) PDs^{[10, 11]}, and two-dimensional materials PDs^{[12, 13]}. Compared to conventional PDs, avalanche photodiode (APD) exhibits a higher sensitivity due to its internal gain. The high electric field (E-field) inside the APD multiplication region accelerates the photon-generated carriers (electrons and holes) until they obtain sufficient energy to promote new electrons from the valance band into conduction band, creating new electron-hole pairs. This process is known as impact ionization, which leads to the amplified electric output signal from APDs. Accordingly, the internal amplification can improve the receiver signal-to-noise ratio (SNR) and help detect very weak optical signals^[14]. The SNR of the APD can be expressed as

$ \rm{SNR} = \frac{{I_{\rm{photo}}^2}}{{2q{I_{\rm{total}}}F(M)\Delta f + \dfrac{{\sigma _{\rm{circuit}}^2}}{{{M^2}}}}} , $  (1)

where is photocurrent, is total current, is elementary electric charge, is excess noise factor, is bandwidth, M is average gain, and is the root mean square (RMS) noise current of the following electronic circuitry. APD gain can effectively suppress the electronic circuit noise until the APD noise is equivalent to the circuit noise. In this work, we provide an overview on the recent research of APDs on Si, including monolithic and heterogeneous integrated APDs with different material systems. Numerous effort has been done to boost the bandwidth and sensitivity performance of Si-integrated APDs to make it an attractive Rx solution for next-generation optical interconnects.

To achieve efficient absorption at attractive near-infrared wavelengths, such as 1310 and 1550 nm, different semiconductor materials with narrower bandgaps have been integrated on Si. The integration of CMOS-compatible semiconductors, e.g., Ge, on a SiPh platform can easily leverage the mature CMOS technologies and provide high-performance photonic devices with low manufacturing costs. There is also no fundamental roadblock to prevent CMOS-incompatible materials, e.g., III–V, integrated on the large-scale Si wafers from being processed in a dedicated 200 or 300 mm process line to benefit process accuracy and throughput in CMOS production lines because of Intel’s huge success to commercialize III–V-on-Si diode lasers in their 300 mm production lines. Several integration methods have been developed to achieve high quality semiconductors on Si, including monolithic and heterogenous integrations. In this section, we introduce several typical material systems for SiPh-integrated APDs, namely Si–Ge, III–V, and QD APDs.

Similar to Si, Ge is a group-IV crystalline semiconductor. It is a widely used complementary material for Si in both electronics and photonics circuits that can be directly grown on Si. For light detection, Ge is an excellent material as its ~ 0.8 eV bandgap is narrow enough for efficient absorption in telecommunication wavelength windows, and the fast mobility of electrons and holes provides potential for high speed. Although the 4.2% lattice mismatch between Ge and Si causes misfits and threading dislocations, the improved growth techniques can reduce the dark current of Si–Ge APDs to an acceptable level^[15]. In the past ten years, with the development of SiPh, monolithic Si–Ge APDs have attracted extensive research interest. Si itself is a decent material candidate for the APD multiplication region because of its extremely low ratio of the impact ionization coefficients for holes and electrons, k, being only about 0.01–0.02 versus ~ 0.9 for Ge and ~ 0.4 for InP. For bulk multiplication regions, the excess noise factor is a function of the average gain and multiplication layerk value, which is given by^[16]

$ F(M) = kM + (1 - k)(2 - 1/M). $  (2)

The excess noise factor increases with increasing gain M, while increases slower with lower k value. A low k means that electrons are much easier to get impact ionization than holes, reducing the stochastic gain fluctuations, thus the source of the excess noise is suppressed. In addition, Emmons has shown that low k value is also helpful for high gain-bandwidth product (GBP) in Ref. [17]. Consequently, a multiplication region with low k value is desired in APD. Due to similar electron and hole ionization coefficients for Ge, itsk value is close to unity (~ 0.9). Therefore, utilizing Ge as the absorption region and Si as the multiplication region can achieve advantages of both materials. Many device structures have been proposed for monolithic Si–Ge APDs, as shown in Fig. 1, from left to right, including lateral, hybrid vertical and lateral, and vertical structures.

Fig. 1(a) is a simple lateral p–i–n APD with a Si–Ge–Si heterojunction. The E-field at the Si–Ge interface is larger than that in the intrinsic Ge region, so that most impact ionization events occur at the interfaces of Si–Ge heterojunction and result in an effective k ~ 0.25^[18]. Benedikovic et al. reported the lateral Si–Ge–Si waveguide APD at 1550 nm with a breakdown voltage of ~ –11 V, highest gain of ~120, responsivity of ~ 0.29 A/W, bandwidth of ~ 33 GHz, GBP of ~ 210 GHz, and open eye diagrams at 40 Gb/s NRZ that with sensitivity ~ −11.2 dBm for 10⁻⁹ bit error rate (BER) as shown in Fig. 2(a)^[18]. Fig. 1(b) shows a lateral APD with separate absorption, charge, multiplication (SACM) regions. Due to the lateral p–i–p–i–n doping structure inside the Si, the E-field is concentrated on the left Si intrinsic region to be the multiplication region. And the absorption region, Ge, is grown into the cavity of the right Si intrinsic region to protect Ge from high E-field. The light will be coupled into the Ge layer and then absorbed, the photon-generated carriers then drift to the left Si regions and only get impact ionization inside the multiplication region. Srinivasan et al. proposed the lateral SACM Si–Ge APD at 1550 nm with a breakdown voltage of ~ –12 V, highest RF gain of ~ 11, responsivity of ~ 0.78 A/W, bandwidth of ~ 27 GHz, GBP of ~ 300 GHz, and open eye diagrams at 50 Gb/s NRZ as shown in Fig. 2(b)^[19]. Differently, a lateral p–i–n Si APD with Ge on the top is shown in Fig. 1(c). The Ge absorption is directly grown on the top of the Si intrinsic region, since there is no charge layer, and the E-field will be distributed inside the intrinsic Ge and Si region. As a narrow bandgap semiconductor, Ge needs lower E-field to start impact ionization than Si, thus most carriers will be amplified inside the Ge and exhibit higher excess noise. Zhang et al. demonstrated the Ge on lateral Si p–i–n APD that exhibits an effective k of within 0.4–0.6, a breakdown voltage of ~ –12.5 V, a gain up to 16, a responsivity of ~ 0.95 A/W, a bandwidth up to 33 GHz, and detectable signals with 32 Gbaud PAM4 and 40 Gbaud 16QAM modulations at 1550 nm. The I–V curves and PAM4 eye diagrams are shown in Fig. 2(c)^[20]. The hybrid vertical and lateral Si–Ge APD structure is shown in Fig. 1(d). Compared to Fig. 1(c), the main difference is the bias on Ge, it is a three-terminal device that allows individual E-field control in Ge and Si. The carriers are generated and transited in vertical structure, and then multiplied in a lateral Si structure. This structure can control all impact ionization events that occur inside Si for low excess noise. Fig. 2(d) shows the I–V and eye diagrams of the three-terminal Si–Ge APD demonstrated by Zeng et al. A benefit from the directly E-field control within the Si, the three-terminal APD enables a very low breakdown voltage of ~ –6 V, a responsivity of ~ 0.48 A/W, a bandwidth of ~ 19 GHz, and clear eye diagrams at 35 Gb/s NRZ at 1550 nm^[21]. As for the common vertical structure, Figs. 1(e) and 1(f) illustrate the Si–Ge SACM APDs with p–p–i–n^[22] and p–i–p–i–n^{[23, 24]} structures, respectively. Both structures can ensure carriers get impact ionization in the Si multiplication region. Thanks to the fast diffusion velocity of Ge, the p–p–i–n SACM APD is also able to exhibit high bandwidth of ~ 25 GHz without being limited by carrier transit time^[22].

In addition to concentrating the electric field to form the multiplication region inside low k value Si, the thickness of the multiplication region is also important. A thin multiplication region can reduce the carrier transit time, which is the premise of achieving high bandwidth. Besides that, the dead-space effect cannot be ignored. Unlike the excess noise local model of Eq. (2), a non-local model is necessary because the carrier history should be included for the thin multiplication region^[25-27]. The effective k value will be further reduced with the dead-space effect. In the Hewlett Packard Enterprise (HPE), we demonstrated the Si–Ge waveguide SACM APDs with a p–p–i–n structure, as shown in Figs. 3(a) and 3(b), a 100 nm-thick intrinsic Si is used as the multiplication region and the E-field is confined inside it^[22]. This thin Si multiplication layer enables a high bandwidth and GBP because of the small transit time and build-up time. At 30 °C, the 4 × 10 µm² Si–Ge waveguide APD exhibits a 3-dB bandwidth of ~ 26 GHz and a GBP of ~ 282.4 GHz as shown in Fig. 3(c)^[28]. And the inset I–V curve shows the Si–Ge APD has a low breakdown voltage of ~ –10 V with a highest gain ~ 20. All the measurements for the Si–Ge SACM APD are based on a 1550 nm laser. Another benefit of the thin multiplication region is its great thermal stability. The thin multiplication region requires a higher E-field to achieve the same gain than the thick one, such that carriers obtain sufficient ionization energy more quickly, and it results in less phonon scattering before avalanche breakdown. Therefore, carriers are less sensitive to temperature-dependent phonon energy^{[29, 30]}. Figs. 3(d)–3(f) illustrate the temperature-dependent characteristics of gain, bandwidth, and eye diagrams, respectively^[31]. The 100 nm multiplication region Si–Ge SACM APD exhibits an excellent temperature stability as the breakdown voltage only increases ~ 4.2 mV/°C, bandwidth only reduces ~ 22 MHz/°C, and clear eye diagrams with 32 Gb/s NRZ and 64 Gb/s PAM4 are obvious at both 30 and 90 °C.

The 4 × 10 µm² Si–Ge SACM APD has shown high-speed performance because the waveguide SACM structure decouples the photon absorption length (10 µm) in the wafer plane and carrier transit length (100 nm) normal to the wafer plane. However, there is still a trade-off between absorption length and RC time constant. To further loosen the trade-off, different simple Si mirrors have been integrated at the end of the Si–Ge waveguide APD to improve its responsivity without compromising the bandwidth^{[32, 33]}. Fig. 4(a) shows the schematic of the Si–Ge APD with no reflector (Normal), a distributed Bragg reflector (DBR), and a loop reflector (LR). The integrated DBR and LR reflect the unabsorbed light after the first pass back into the APD forming a dual-path absorption. The simulated absorption profiles for the APD without and with a reflector are shown in Fig. 4(b), where the reflected light interferes with the incident light to cause the interference fringes for the APD with reflector. We have demonstrated three reflector designs, including DBR1 with 267 nm groove and 428 nm teeth, DBR 2 with 211 nm groove and 173 nm teeth, both 5 µm wide, and LR with 500 nm waveguide width and 10 µm loop radius. Comparison of the calculated reflectivity for these three reflectors is illustrated in Fig. 4(c), they all have considerable reflectivity > 70% at 1550 nm. The measured photocurrent versus input optical power at the unity gain point is shown in Fig. 4(d), the extracted responsivity of the Normal APD is ~0.75 A/W and it is improved up to ~0.98, 1.10, and 1.12 A/W for DBR1, DBR2, and LR APDs, respectively. The enhanced responsivity is not only caused by the dual-path absorption but also the light interference. The interference between reflected and incident light changes the mode oscillation between the Si and Ge layers, it also creates a better absorption profile. The speed performance of Normal, DBR1, DBR2, and LR APDs can be evaluated by their impulse responses as displayed in Fig. 4(e), where a femtosecond 1550 nm laser was used as the source. The full width at half maximum (FWHM) of the impulse responses are all around 14.5 ps, which indicates that all four APDs have similar speed performance. Adding a reflector does not delay the overall response process of APDs.

The enhanced responsivity can further improve the sensitivity of the low noise Si–Ge APDs. Figs. 4(f) and 4(g) show the comparison of their BERs at bias voltage of –8 and –10 V, respectively. A 32 Gb/s bit error rate tester was used to measure the BERs with 32 Gb/s NRZ operation. The BER of error-free transmission with KP4 forward error correction (FEC) is 2.4 × 10⁻⁴ as dash lines indicate in Figs. 4(f) and 4(g). At the bias of –8 V, Normal, DBR1, DBR2, and LR APDs achieve a sensitivity of ~ 11.7, –12.9, –13.3, and –13.4 dBm, respectively. The reflector-assisted APDs achieve 1–2 dB better sensitivity. Increasing the bias voltage to –10 V, Normal, DBR1, DBR2, and LR APDs obtain sensitivity of –15.0, –16.0, –15.9, and –15.7 dBm, respectively. And the APDs with reflector still allow ~ 1 dB better sensitivity. The high sensitivity Rx is desired in optical links, which can reduce the laser source power consumption and improve overall link energy efficiency. The Si–Ge waveguide APD with p–p–i–n SACM structure has been proved to have low excess noise, low operation voltage, high speed, high sensitivity, and excellent temperature stability characteristics. By adding the reflector at the end of the APD waveguide, the sensitivity can be further improved without changing any speed performance. We believe the high-performance Si–Ge SACM APD is an attractive Rx for future sub-pJ/bit optical links.

III–V compound semiconductors have been widely used in active photonics devices due to their direct bandgaps, variable band structures, and flexible complex structure design. Integration of III–V semiconductors on Si has attracted significant interest as it can provide high-performance III–V photonics devices on SiPh platform, especially for lasers^[34–36]. At telecommunication wavelengths, conventional III–V APDs, such as InGaAs/InAlAs and InGaAs/InP SACM APDs, have shown low dark current, low excess noise, high bandwidth, and high GBP performance^[37–40]. In addition to being the ideal candidate Rx in optical interconnects, the low dark current III–V APDs also show a potential for single-photon detection^[41–43]. Integrating III–V APDs with SiPh PICs can improve performance, reduce cost, and expand applications, such as light detection and ranging (LiDAR)^[44–46] and quantum photonic circuits^{[47, 48]}. Several approaches have been demonstrated to integrated III–V materials on Si, for example hybrid integration through packaging, and heterogeneous integration through wafer bonding or transfer printing^{[36, 49, 50]}. In this section, we focus on integrating III–V APDs on Si by heteroepitaxy^[51]. The first III–V APD grown directly on Si is reported in Ref. [52]. The InGaAs/InAlAs SACM APDs have been chosen to grow on a InP/Si template, whose cross-sectional schematic is shown in Fig. 5, where InGaAs is used as p-type contact and absorption layers, Al_xInGaAs is used as band structure grading layers, InAlAs is used as charge, multiplication, buffer, and n-type contact layers. The APD sample was grown on a InP/Si template at 500 °C after 10 min oxide desorption on the InP surface with As₂ overpressure^[52]. The InP/Si template, from top to bottom, is composed of InP, InAlAs, GaAs, Ge, and Si layers as shown in Fig. 5.

The characteristics of the InGaAs/InAlAs SACM APD on Si are illustrated in Fig. 6. The I–V and gain curves of the APD on Si was measured at 1550 nm, the punch-through voltage is ~ –14 V and the highest gain is up to ~ 20. As shown in Fig. 6(b), the unity gain point responsivity of the top illuminated APD was measured with 1550 and 1310 nm light, where the captured responsivity is ~ 0.54 and 0.48 A/W, respectively. Considering the different wavelength photon energies, the corresponding external quantum efficiency is ~ 43% at 1550 nm and ~ 46 % at 1310 nm. Fig. 6(c) shows the excess noise performance, the k value of the III–V APD on Si is ~ 0.2. It is consistent with the reported value of the InP-based APD with comparable thick InAlAs multiplication region^[53]. One primary challenge of the heteroepitaxial method is the large lattice mismatch between III–V and Si, although Ge, GaAs and InAlAs layers all serve as a buffer for the InP/Si template, the concomitant defects in grown semiconductors are still inevitable where the defect density is ~ 10⁸ cm^–2. The defect problem is particularly important for APD since it is a high E-field device. Therefore, another InGaAs/InAlAs APD on the InP substrate with the same epitaxial layers was grown for direct comparison. Figs. 6(d) and 6(e) show the temperature dependent dark current for a 20 µm-diameter APD on Si and a 50 µm-diameter APD on InP, respectively. The main difference is that the APD on Si has weaker temperature dependence of dark current at high voltages, which means the temperature-independent trap-assisted tunneling starts to dominate the dark current. The temperature variation of the dark current also indicates the thermal activation energy of the APDs,

$ {I_{\rm{dark}}} \propto {T^2}\exp \left( { - \frac{{{E_{\rm a}}}}{{{k_{\rm B}}T}}} \right), $  (3)

where T is the absolute temperature, is the activation energy, and is the Boltzmann constant. At low bias voltage, the generation-recombination is the dominate dark current mechanism. The dark current density at bias voltage of –5 V is plotted in Fig. 6(f), the APD on Si exhibits 1–2 order higher dark current density than the one on InP. The activation energies then can be extracted, is ~ 0.5 eV for the APD on Si while it is ~ 0.3 eV for the APD on InP, which implies that the APD on Si has a deeper generation-recombination defect center. In summary, the InGaAs/InAlAs SACM APD on Si by heteroepitaxy enables a high gain and a relatively high responsivity. It has as low excess noise as the APD on Si, however, the dark current is still higher due to the large lattice mismatch.

While Ge on Si APDs and III–V on Si APDs have proved to be efficient detectors in silicon-based photonic integrated circuits for data communications, one of the main issues with these devices is their relatively high dark currents, which increases noise and limits sensitivity at high data rates. For example, dark current densities of 5 A/cm² were measured for Ge-on-Si photodiodes operating at 1300 nm^[54], 2 mA/cm² for a Ge-on-Si photodiode operating at 1550 nm^{[55, 53]}, and 1 mA/cm² for a monolithically integrated III–V on Si photodiode. One promising alternative for ultra-low dark current photodiodes on silicon is the III–V quantum dot (QD) photodiode integrated on silicon. Due to the three-dimensional confinement of carriers within quantum dots, these devices naturally have ultra-low dark currents^[56]. Moreover, the high defect tolerance of QDs due to the strong localization of charges minimize the impact of dislocations within the QD absorption layers and keep the dark current low. Next, we will review recent progress of III–V QD APDs heterogeneously and monolithically integrated on Si.

Since there is a large lattice constant mismatch between Si (a₀ = 5.4310 Å) and most III–V compound semiconductors such as GaAs (a₀ = 5.6533 Å), InP (a₀ = 5.8687 Å) and InAs (a₀ = 6.0584 Å), and mismatches in polarity and thermal expansion coefficients, directly growing these types of materials on silicon would create a large number of dislocations, significantly degrading the performance and increasing the dark current of photodiodes fabricated out of these materials, as discussed above. Thick buffer layers or other dislocation filtering or blocking techniques have been helpful to reduce the dislocation density down to ~10⁶ cm^–3, which is still a few orders of magnitude higher than the intrinsic value of epitaxial structures grow on a III–V native substrate. Thick buffer layers also prevent straightforward evanescent optical coupling between Si and III–V active region, which subsequently limits design flexibility of these devices in their integration with a silicon photonic integrated circuit. Heterogeneous integration offers the most practical and promising approach in the near-term to integrating high-performance III–V photonic devices directly onto silicon. This approach was discovered by Fang et al. in 2006 and since it has been developed and advanced significantly as a key technology for high-volume, low-cost on-chip active photonics, including photodetectors^[57]. By growing the device epitaxial layers on a separate III–V substrate, and then bonding the III–V layers to silicon, one can fabricate high-performance devices made out of quality materials and prevent the dislocations produced by growing III–V layers directly onto silicon. Companies like Intel, Juniper Networks, and HPE have adopted this approach in order to develop low-cost on-chip lasers and photodetectors since^[58].

In particular, HPE has used this method to fabricate InAs QD avalanche photodiodes heterogeneously integrated on silicon^{[59, 60]}. The devices were notably made from the same epitaxial layers and fabrication process as QD comb lasers designed for dense wavelength-division multiplexing (DWDM) links. It shows the integration capability of these devices on a quantum dot-based silicon photonics platform. Fig. 7 shows a cross-section schematic of the quantum dot APD. The device consists of a p–i–n structure, in which the absorption region consists of eight layers of InAs quantum dots separated by 40 nm GaAs spacer layers, totaling 320 nm. The quantum dots were grown on a GaAs substrate using self-assembled growth in a molecular beam epitaxy (MBE) system^[62]. The absorption coefficient of the entire QD active region was measured to be about 900 cm⁻¹. The intrinsic region of the p–i–n photo diode acts simultaneously as the absorption and multiplication layer of the APD. The III–V epitaxial material was bonded directly onto a silicon-on-insulator (SOI) wafer using an O₂ plasma-assisted wafer bonding process^[63]. 320 nm thick ridge waveguides and grating couplers were etched directly on the SOI substrate, with a 1000 nm layer of buried oxide, before bonding. Next, mesas of different sizes were formed using a combination of dry and wet etching, and metals were deposited on p and n contacts and connected to RF pads for high-speed electrical measurements. The full fabrication process can be found in Ref. [59].

These APDs have shown the lowest dark current for any photodiode on silicon, as low as 10 pA (1 × 10⁻⁶ A/cm²) at –1 V for a 11 × 30 µm² waveguide APD. Furthermore, the dark current density for a 11 × 60 µm² device was 2.7 × 10^–6 A/cm² at –1 V and 3.4 × 10^–6 A/cm² at –1 V for a 11 × 90 µm² device. The dark current scaling linearly with area suggests that the main contribution to the dark current comes from the bulk layers of the device. The low dark current is due to the combination of the 3-D carrier confinement of the QDs, good surface passivation of the PDs, low dislocation density and the high crystal quality of the active device material. Keeping the dark current low helps reduce the noise of the APD. The dark current was also measured as a function of temperature, as seen in Fig. 8(a). The breakdown voltage increases with temperature, implying that impact ionization is the main carrier mechanism behind the device breakdown.

Device testing starts from light coming from an O-band tunable laser which was coupled into the grating coupler and the silicon waveguide then evanescently coupled into the APD. The spectral response in the O-band was taken for an 11 × 90 µm² device and plotted in Fig. 8(b). There is both a wavelength and a bias dependence observed in the responsivity and gain of the device. This is accounted for by a combination of the avalanche gain and absorption of carriers within the device. As the wavelength of the input photons varies, the energy level of the photogenerated carriers within the QDs also varies. As carriers fill up the different energy levels, the carrier escape rates from the QDs change, altering the quantum efficiency, as well as the impact ionization rate of the carriers.

The responsivity at unity gain (–4 V) was 0.9 A/W at 1280 nm and 0.15 A/W at 1310 nm, implying a wavelength dependence on the absorption coefficient. At shorter wavelengths of the input optical mode, carriers are generated in the excited state within the QDs, and therefore, need less energy in order to escape the QDs. With the same bias voltage applied and an incoming 1310 nm optical signal, more carriers are generated in the ground state of the QD that need more energy in order to escape, causing a small amount of photocurrent being collected. Moreover, as the bias voltage increases, the absorption coefficient also shifts due to the quantum confined Stark effect (QCSE). The electron and hole wavefunctions inside the QDs shift with an increased in electric field applied, causing a subsequent shift in the absorption coefficient with wavelength^[64].

The avalanche gain was measured and is shown in Fig. 8(c). With an input TE optical mode, a maximum gain of around 150 was measured at around –17.8 V, which is near the breakdown voltage. The polarization of the optical signal was then altered using a polarizer to change the input optical mode to the APD between TE and TM, and a polarization dependence on responsivity and gain was observed. With an input TM polarization, the gain increased by about a factor of 2 and the responsivity increased by a factor of 6. This is suggested to be due to a higher number of light holes being generated with TM polarization and then impact ionizing^[65].

The high-speed dynamics was measured at –15, –16, and –17 V and can be seen in Fig. 8(d). These devices have also demonstrated a maximum 3-dB bandwidth of 20 GHz at and a maximum gain–bandwidth product (GBP) of 585 GHz, which is the record for III–V quantum dot APDs on silicon. 25 Gb/s open eye diagrams were also recorded (Fig. 8(e)) and a sensitivity of –11 dBm was measured at 10 Gb/s (Fig. 8(f)). Conclusively, III–V QD APDs heterogeneously integrated on silicon are still in their early stage of development but have a promising future as receivers in future WDM silicon photonic integrated circuits.

While wafer bonding has been successful in the development of high-performance III–V QD APDs on silicon, another promising approach is by monolithically growing III–V QD materials directly on silicon. The main advantages of this solution include ease of integration and scalability in regard to producing a large volume of devices on wafer. Also, due to the high defect sensitivity of QDs, the device performance will not be significantly reduced by dislocations. One way of growing III–V QD materials monolithically on Si is by using MBE and thick buffer layers. Another approach to this is by using metal organic chemical vapor deposition (MOCVD) and aspect ratio trapping. This method allows for the growth of GaAs on Si with a low defect density to produce QD avalanche photodiodes with low dark currents. Recently, there has been significant progress made on monolithically integrated QD APDs on silicon, which we discuss next.

The first InAs/GaAs QD photodetector monolithically integrated on silicon substrates was done using molecular beam epitaxy (MBE) by Wu et al.^[66]. This device was grown directly on silicon using a GaAs buffer, reducing the threading dislocation density to ~10⁶ cm⁻². Sandall et al. performed a study p–i–n photodiodes utilizing five periods of InAs/InGaAs dot-in-a-well (DWELL) grown on silicon substrates using MBE for absorption at around 1300 nm^[67]. The device epitaxial layer structure as well as a TEM image of the wafer can be found in Figs. 9(a) and 9(b). The dark current density was measured to be in the range of 10⁻⁶ A/cm² for a 25 μm diameter circular mesa photodiode, which agrees with ultra-low dark current density observed in previously discussed heterogeneous counterparts. An avalanche gain as high as 8.5 was measured at about –26 V (Fig. 9(c)). Impact ionization was confirmed to be the main source of avalanche gain, and it was suggested that absorption occurs in the dot layers and the impact ionization events occur in the other layers of the depletion region. A peak responsivity of 5 mA/W was observed at 1280 nm for a 200 μm diameter circular mesa photodiode, and spectral response measurements indicate that the photon absorption in the QD layers is affected by the QCSE^[67].

Wan et al. fabricated p–i–n photodetectors from InAs/GaAs QDs directly grown on a GaAs-on-V-grooved-Si (GoVS)^[68]. The p–i–n structure included seven stacks of InAs DWELL structures with a dot density of 6 x 10¹⁰ cm⁻². A schematic plot, as well as top and cross-sectional views of the PD, can be seen in Fig. 10. First demonstrations of these devices showed a dark current as low as 0.8 nA, an internal responsivity of 0.9 A/W at 1250 nm, and a 3-dB bandwidth of 1.5 GHz measured and at a reverse bias voltage of –4 V. The high-frequency O/E response was limited by the combination of the RC time and hole escape time in the QDs, which was calculated to be about 30 ps.

Chen at al. measured device characteristics of InAs QD APDs grown with the same approach as Wan et al.^[69]. These devices consisted of five layers of InAs QDs within a p–i–n structure. A schematic diagram of these devices can be found in Fig. 11(a). These APDs exhibited impressively low dark current at about 0.1 nA and a dark current density of 6.6 × 10⁻⁵ A/cm² at 300 K under a bias voltage of – 5 V. The gain was measured to be as high as 198 at 293 K (Fig. 11(b)). Furthermore, these devices showed an external responsivity as high as 0.234 A/W at 1310 nm and at unity gain (–5 V), and a 3-dB bandwidth of about 2.26 GHz at –6 V and 2.06 GHz at –16 V (Fig. 11(c)). The 3-dB bandwidth was limited by a combination of the RC and transit time of the device. Furthermore, the transit time consists of both the carrier transport and carrier emission time out of the quantum dots. As the voltage increases into the high-gain regime of the APD, the bandwidth becomes limited by the avalanche buildup time. Open eye diagrams were shown for these devices as high as 8 Gb/s at a high gain bias point of –15.9 V, and can be seen in Fig. 11(d).

While growth of these materials directly on silicon is being developed, APDs made from these materials are not quite ready for practical usage within industry for mass volume production. Some of the challenges consist of a limited understanding of the growth mechanics and physical carrier mechanisms of quantum dot lasers and photodetectors. And while offering plenty of advantages on a device level, we still need a better understanding of how to mitigate issues such as lifetime, repeatability, temperature sensitivity, and design flexibility. However, in the long term, this integration approach may likely be the preferred method of growth for quantum dot avalanche photodiodes on a silicon photonics platform for high-speed optical interconnects for data communication within data centers and HPC systems.

Properties of different material APDs integrated on Si are summarized in chronological order as shown in Table 1. It includes Si–Ge, InGaAs-InAlAs, InAs QD, InAs-GaAs QD, and InAs-InGaAs QD material systems; where λ is the working wavelength, V_br is the breakdown voltage, M is the highest gain, I_dark is the dark current at unity gain, R is the responsivity at unity gain, BW is the highest bandwidth, GBP is the gain-bandwidth product, and BR is bit rate of eye diagrams.

Si–Ge APD is the most popular APD on SiPh platform due to the maturity of Ge growth technology on Si. Table 1 shows five different structures of Si–Ge APDs. The thin multiplication region of these Si–Ge APDs enables low breakdown voltage and high bandwidth. Besides that, the extremely low excess noise of Si makes Si–Ge APDs suitable for high bit rate operations. In contrast to Ge, most III–V semiconductors have much bigger lattice mismatch with Si. Therefore, a lot of effort has been put into heterogeneous or monolithic III–V on Si integration. For example, the bulk InGaAs–InAlAs material system have monolithically grown on Si to form SACM APDs. Although, several buffer layers are added to reduce the large lattice mismatch, the InGaAs-InAlAs APD on Si still shows much higher dark current than the same APD grown on InP. To alleviate the high dark current problem, QD is a promising material system for III–V APDs on Si. QD materials have a higher defect tolerance as a result of the strong localization of charges, which is particularly effective for the high dislocations problem in III–V on Si integration. In addition, QD itself has low dark current property due to the nature of three-dimensional confinement. As shown in Table 1, InAs QD, InAs-GaAs QD, and InAs-InGaAs QD APDs have been integrated on Si heterogeneously or monolithically. All of these QD APDs have much lower dark currents at unity gain compared to Si–Ge and bulk III–V APDs. However, QD APDs on Si still have some drawbacks that need to be improved. First, most integrated QD materials on Si have a relatively wide bandgap, resulting in a weak edge absorption around 1310 nm. Also due to the QCSE, the edge absorption coefficient changes with the electric field. Most current QD APDs on Si have a vertical p–i–n structure, such that light is absorbed and multiplicated in the same QD layer. It leads to high excess noise and a tighter trade-off between bandwidth and responsivity, which limits the high data rate performance.

Although the above material systems have been successfully monolithic or heterogeneous integrated on Si, APDs based on these materials still face challenges. For Si–Ge APDs, the dark current is still relatively high due to the lattice mismatch between Si and Ge. By further reducing misfits and threading dislocations at the Si–Ge interface, a dark current can be suppressed and thus enables better sensitivity. A similar problem of high dark current also exists for bulk III–V APDs on Si, requiring more efficient buffer layers to relive the stress between III–V and Si. Differently, QD APDs on Si are not sensitive to dislocations and thus have the ideal dark current. However, the speed, responsivity, and excess noise performance are not comparable to bulk semiconductor APDs. More optimized APD structures should be adopted to improve the overall performance of QD APDs.

In conclusion, we reviewed recent advances of the integrated APDs on silicon. The APDs on SiPh can leverage rewards of high-performance optical receivers and CMOS-compatible SiPh-integrated circuits, therefore provide an attractive Rx solution with standard manufacturing processes and low costs. One great advantage of APDs over PDs is its internal gain allows the optical links to have better SNR, which is crucial for many applications, such as future high-density, low-latency, and low-power optical interconnects. In past decades, numerous effort has been done to realize APDs on Si using monolithic or heterogeneous methods, and diverse semiconductor systems, including Si–Ge and III–V. Due to their great performance, especially the low excess noise and high sensitivity, integrated APDs will be of great use in a broad range of applications. It is not difficult to predict that high-quality APDs on Si will create a large market and become a powerful technology for explosive data growth.