A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers

Shuyu Bao; Yue Wang; Khaw Lina; Li Zhang; Bing Wang; Wardhana Aji Sasangka; Kenneth Eng Kian Lee; Soo Jin Chua; Jurgen Michel; Eugene Fitzgerald; Chuan Seng Tan; Kwang Hong Lee

doi:10.1088/1674-4926/42/2/023106

Journals >Journal of Semiconductors >Volume 42 >Issue 2 >Page 023106 > Article

Journal of Semiconductors
Vol. 42, Issue 2, 023106 (2021)

A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers

Shuyu Bao¹, Yue Wang¹, Khaw Lina¹, Li Zhang¹..., Bing Wang^1,2, Wardhana Aji Sasangka¹, Kenneth Eng Kian Lee¹, Soo Jin Chua^1,3, Jurgen Michel^1,4, Eugene Fitzgerald^1,5, Chuan Seng Tan^1,6 and Kwang Hong Lee¹|Show fewer author(s)

Author Affiliations

¹Low Energy Electronic Systems (LEES), Singapore-MIT Alliance for Research and Technology (SMART), Singapore 138602, Singapore

²School of Electronics and Information Technology, Sun Yat-Sen University, Guangzhou 510006, China

³Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576, Singapore

⁴Materials Research Laboratories, Massachusetts Institute of Technology, Cambridge, MA, 02139, USA

⁵Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, USA

⁶School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore

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DOI: 10.1088/1674-4926/42/2/023106 Cite this Article

Shuyu Bao, Yue Wang, Khaw Lina, Li Zhang, Bing Wang, Wardhana Aji Sasangka, Kenneth Eng Kian Lee, Soo Jin Chua, Jurgen Michel, Eugene Fitzgerald, Chuan Seng Tan, Kwang Hong Lee. A review of silicon-based wafer bonding processes, an approach to realize the monolithic integration of Si-CMOS and III–V-on-Si wafers[J]. Journal of Semiconductors, 2021, 42(2): 023106 Copy Citation Text

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Abstract

The heterogeneous integration of III–V devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications, such as HEMT or LED with integrated control circuitry. For heterogeneous integration, direct wafer bonding (DWB) techniques can overcome the materials and thermal mismatch issues by directly bonding dissimilar materials systems and device structures together. In addition, DWB can perform at wafer-level, which eases the requirements for integration alignment and increases the scalability for volume production. In this paper, a brief review of the different bonding technologies is discussed. After that, three main DWB techniques of single-, double- and multi-bonding are presented with the demonstrations of various heterogeneous integration applications. Meanwhile, the integration challenges, such as micro-defects, surface roughness and bonding yield are discussed in detail.

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