Lateral current spreading in the 4H-SiC Schottky barrier diode (SBD) chip is investigated. The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated. The results indicate that there is a fixed spreading resistance at on-state in current spreading region for a specific chip. The linear specific spreading resistance at the on-state is calculated to be 8.6 Ω/cm in the fabricated chips. The proportion of the lateral spreading current in total forward current (P_sp) is related to anode voltage and the chip area. P_sp is increased with the increase in the anode voltage during initial on-state and then tends to a stable value. The stable values of P_sp of the two fabricated chips are 32% and 54%. Combined with theoretical analysis, the proportion of the terminal region and scribing trench in a whole chip (K_sp) is also calculated and compared with P_sp. The K_sp values of the two fabricated chips are calculated to be 31.94% and 57.75%. The values of K_sp and P_sp are close with each other in a specific chip. The calculated K_sp can be used to predict that when the chip area of SiC SBD becomes larger than 0.5 cm², the value of P_sp would be lower than 10%.