Since the first realization of AlGaN/GaN high electron mobility transistors (HEMTs)^[1], GaN-based devices have made great progress over the past three decades. AlGaN/GaN HEMTs are promising candidates for high frequency and high-power microwave applications due to superior properties such as large band gap energy, high electron saturation velocity, high critical electric field strength, and high sheet charge densities at the interface resulting from large conduction band offset and strong polarization effects^{[2, 3]}. Due to the absence of large-sized and high-quality GaN homogeneous substrates, foreign substrates for instance, sapphire, SiC, Si are widely used in GaN-based HEMTs^{[4, 5]}. Among them, semi-insulating (SI) SiC remains the best choice of substrates, owing to its high thermal conductivity, high resistivity and the maturity in large-wafer mass production up to 6 inches^{[6, 7]}.

X-band power amplifiers are used in military and commercial radar systems, as well as communication data links; indeed, these applications demand high power gain (G), high power efficiency and suitable power specifications. GaN HEMTs have been proved to be an ideal candidate with high power densities^[8-10]. In our previous work, the output power (P_out) of X-band GaN HEMT devices reached 22.4, 45.2 and 110.9 W, respectively^[11-13]. Although the performance of GaN HEMTs is getting better and better, it is still not easy to fabricate GaN HEMTs operating at X-band with high power gain and high efficiency. One of the key challenges is the limitation of the material quality. Due to heteroepitaxy on semi-insulating SiC substrate, the two-dimensional electron gas (2DEG) structure materials always have large number of defects, for example, the dislocation density is in the order of 10⁸ cm^–2. The 2DEG mobility and concentration are necessary further improved to decrease the access resistances of the HEMT devices^[14]. Another important issue is the trap-induced current collapse under high drain voltage bias, which severely degrades the performances of the device at high-frequency operation^{[15, 16]}. Although the passivation layer^[17] and field plates^[18] were introduced to mitigate the trapping effects, the current collapse was still difficult to be eliminated.

In this paper, AlGaN/GaN HEMT structural materials with high mobility, high two-dimensional electron gas density and high uniformity were grown using a metal-organic chemical vapor deposition (MOCVD) system. HEMT devices were fabricated and their small and large signal properties were characterized. HEMT devices operating at 8 GHz with high power gain and high power-added efficiency (PAE) were realized although trapping effects were not removed completely.

The schematic of the AlGaN/GaN HEMT structure used in this study is shown in Fig. 1, which was grown by MOCVD on 4-inch SI 4H-SiC substrate. AlN nucleation layer, GaN buffer layer with high resistivity, GaN layer with high mobility, AlN interlayer, AlGaN barrier layer and GaN cap layer were grown in sequence. The specific growth parameters are shown in Table 1.

The introduction of the GaN channel layer with high crystal quality can enhance the mobility of 2DEG. Compared with the conventional AlGaN/GaN heterostructures, the insertion of the AlN interlayer can provide higher barrier, which improve the discontinuity of the conduction band and the confinement of the electron wave function^[19]. As a consequence, the higher electron mobility can be further achieved by reducing the alloy disorder scattering from the AlGaN barrier layer, and the 2DEG sheet density is also increased^[20]. As for the GaN cap layer, it provides larger effective Schottky barrier height^[21], reduces the ohmic contact resistance^[22], and alleviates the current-collapse effect^[23].

High-resolution X-ray diffraction (HRXRD, by PANalytical X'Pert³ MRD) was adopted to study the crystalline quality and structural properties, while electrical properties were obtained by the room temperature (300 K) non-contact Hall measurements (by Semilab LEI 1610E 100AM). Non-contact sheet resistance measurements (by Semilab LEI 1510C) were carried out at 300 K to characterize the square resistance and their uniformity of the epi-wafers.

The fabrication of devices begins with the formation of drain and source ohmic contacts. The selected metals for ohmic contacts are composed of Ti (20 nm)/Al (120 nm)/Ni (55 nm)/Au (50 nm), deposited by electron beam evaporation, and followed by rapid thermal annealing (RTA) at 850 °C for 30 s in N₂ ambient. The specific ohmic contact resistance of 1.67 × 10^–6 Ω·cm² was measured by the transmission line method (TLM). Mesa isolation was conducted by inductively coupled plasma (ICP) dry etching. Afterwards, Si₃N₄ was deposited by plasma enhanced chemical vapor deposition (PECVD) as the passivation layer. By reactive ion etching (RIE), a 0.45-μm gate recess was formed, then the Schottky T-gate composed of Ni/Au was evaporated and lifted off. Finally, a silicon nitride film was deposited using PECVD to passivate the devices. The measured double-finger device has a gate length (L_G) of 0.45 µm and total gate width (W_G) of 200 µm, a source-to-gate distance (L_SG) of 1.1 µm, and a source-to-drain distance (L_SD) of 4.5 µm. A microscope photograph of the fabricated GaN HEMT is shown in Fig. 2. In order to facilitate on-chip testing, the pad is designed to be suitable for a ground-signal-ground (GSG) probe.

The direct current (DC) and pulsed output I–V characteristics of the double-finger device were carried out using an Agilent B2902A dual-channel precision source/measure unit (SMU). The extrinsic small-signal characteristics of the devices was measured by on-wafer probing from 0.1 to 35 GHz using a SUSS |Z| probe and Agilent E8363B vector network analyzer. The Focus load-pull system were used to carried out the AlGaN/GaN HEMT device source-pull and load-pull measurements in pulse wave (PW) mode with a pulse width of 100 μs and a duty cycle of 1% at the frequency of 8 GHz without intentional harmonic matching. For all the measurements above, the devices were not cooled and the measurements were carried at 300 K.

Shown in Fig. 3 is the HRXRD measured results of the MOCVD-grown AlGaN/GaN HEMT structure. The full widths at half maximum (FWHM) of the (0002) and (10-12) peaks are presented in Figs. 3(a) and 3(b), with values of 266 and 324 arc seconds, respectively. Screw-type dislocation densities (STDDs) and edge-type dislocation densities (ETDDs) can be calculated using the FWHM as 1.422 × 10⁸ and 8.768 × 10⁸ cm^–3, respectively^[24]. These reasonable dislocation densities indicates that the epitaxial crystal materials are in good quality. Fig. 3(c) shows the HRXRD ω–2θ scan of the grown AlGaN/GaN HEMT structure for the (0004) planes. The aluminum (Al) component and AlGaN thickness are fitted to be 25.5% and 21.5 nm respectively, and the measured curve is in excellent consistency with the simulated results.

The results of non-contact Hall measurements are given in Fig. 4. Mapping results in Figs. 4(a) and 4(b) show that the average value of 2DEG mobility is as high as 2291.1 cm²/(V·s) and 2DEG concentration is 9.954 × 10¹² cm^–2, respectively. Furthermore, the epi-wafer exhibited an average sheet resistance (R_sh) of 301.6 Ω/square with a uniformity of 1.64%. All these measured results indicate that our MOCVD-grown AlGaN/GaN HEMT structures are among the state-of-the-art in literature, having excellent properties and being suitable for the fabrication of high-performance devices.

Since the processed AlGaN/GaN HEMT devices were on a 330-μm thick SI-SiC substrate without thinning, to evaluate and decrease the self-heating effect^[24], both DC and pulsed I–V (PIV) measurements were performed. During PIV mode, the quiescent bias point Q (V_GSQ, V_DSQ) was set at (0 V, 0 V), and each pulse cycle included an on-state pulse of 300 µs with a duty cycle of 0.3%. The typical on-wafer measured DC and PIV results are illustrated in Fig. 5 with I_DS–V_DS output characteristics and I_DS–V_GS transfer characteristics of the devices. The device shows good pinch-off with a threshold voltage of V_th = –5 V. The breakdown voltage (V_br) over 100 V was measured. As seen from Fig. 5(a), at a gate bias of 2.0 V the maximum DC and PIV drain saturation current density (I_Dmax) are 1039.60 and 1086.35 mA/mm, respectively. The knee voltage (V_K) extracted from the DC output characteristics is 4.2 V. From Fig. 5(b), peak extrinsic transconductances (g_m) are obtained to be 226.70 and 229.70 mS/mm at a gate bias of –3.0 V, respectively, for two kinds of measurements of DC and PIV. There are no obvious I_DS drop took place under high V_DS bias due to the effective heat dissipation through highly thermally conductive substrate of 4H-SiC. Except for the evident kink effect observed in DC measured output characteristics, there are little difference between the two kinds of measurement results.

The kink effect^[25] is a hysteretic instability of FET drain current, which is observed during a slow drain bias sweep. The drain current shows a small step to increase a few volts above the knee region on the forward-sweep, with a little or no reduction on the return sweep. It has been observed in all generations of field-effect transistors (FETs), irrespective of the material system, whenever the substrate or surface is able to store charge and achieve a potential which diverges from ground. The observed evident kink effect in the DC characteristics imply that traps exist in the AlGaN/GaN HEMT devices. This phenomenon is related to impact ionization, hot electrons, and the presence of traps and surface states in the HEMT structure^{[26, 27]}.

Small signal microwave performance was characterized. Measured current-gain H₂₁ and maximum available power-gain (MAG) as a function of frequency are shown in Fig. 6. The unit current gain cut-off frequency (f_T) and the maximum frequency of oscillation (f_max) was obtained from the extrapolation of H₂₁ and MAG to unity using a –6 dB/octave slope. When the source–drain bias voltage was fixed at 15 V and the source–gate bias voltage at –3.0 V, the measured f_T and f_max is 30.89 and 38.71 GHz, respectively.

Physically, for a FET, f_T is the inverse of the total transit time τ^[28],

$ {f_{\rm T}} = \frac{1}{{2\pi \tau }} = \frac{1}{{2\pi \left( {\dfrac{{{L_{\rm G}}}}{{{v_{\rm{ch}}}}} + \dfrac{{{L_{\rm{GDd}}}}}{{2{v_{\rm{d}}}}}} \right)}}, $  (1)

where L_G is the gate length, v_ch is the effective electron velocity in the channel, L_GDd is the gate–drain depletion length and v_d is the electron velocity in the depletion region. While the extrinsic small-signal characteristics of the AlGaN/GaN device was measured, the source–drain bias voltage was fixed at 15 V larger than the knee voltage 4.2 V. Due to either velocity saturation or pinch-off under the drain side of the channel, f_T approaches its peak. The gate length of the device is 0.45 μm. Supposing that the drain extension is zero and that the electron velocity arrives at the high field saturation velocity of 1.5 × 10⁷ cm/s by Monte Carlo simulation^[29], using the formula above we get intrinsic current gain cut-off frequency (f_TI) to be 58.26 GHz. The measured extrinsic f_T = 30.89 GHz, smaller than the calculated f_TI = 58.26 GHz, is due to the effects of the parasitic resistances and capacitances.

Fig. 6 shows that the f_max/f_T ratio is 1.253. f_max has the following dependence on parasitics^[30]:

$ {f_{\rm{max} }} = \dfrac{{{f_{\rm{T}}}}}{{2{{\left( { {\dfrac{{{R_{\rm{G}}} + {R_{\rm{GS}}} + {R_{\rm{S}}}}}{{{R_{\rm{DS}}}}}} + 2\pi {f_{\rm{T}}}{C_{\rm{GD}}}{R_{\rm{G}}}} \right)}^{\frac{1}{2}}}}}, $  (2)

where R_G is the gate resistance, R_S is source resistance, C_GD is gate–drain capacitance, C_GS is gate–source capacitance and R_GS is the channel resistance in series with C_GS. Generally, C_GD is very small, which can be ignored. The low f_max/f_T ratio is related to the access resistance, the relatively low resistance of the semi-insulating GaN buffer, and output conductance. For our devices, because the T-gate cap is 150 nm thick much smaller than 1.0 μm, large R_G is one of the possible reasons responsible for the low f_max/f_T ratio. By shortening the gate length, gate-recessing, and reducing parasitics, f_T and f_max/f_T ratio can be increased.

Large signal microwave measurements were performed on the wafer without cooling. Fig. 7 shows load-pull results of a 2 × 100 × 0.45 µm AlGaN/GaN HEMT device measured in PW-mode with a pulse width of 100 μs and a duty cycle of 1% by the Focus load-pull system at the frequency of 8 GHz without intentional harmonic matching. The bias was in class-AB operation, under (–3.5, 28) V, (–3.5, 34) V and (–3.5, 40) V gate/drain direct current (DC) bias, respectively. The detailed measurement results are shown in Table 2.

Fig. 7(a) shows the power sweep at a drain bias of 28 V with a linear gain of 17.04 dB. A maximum P_out of 30.54 dBm achieved at P_in = 19.54 dBm with an associated power gain of 11.00 dB and PAE of 50.56%., the gain compression being 6 dB. The saturated output power density is 5.66 W/mm.

Fig. 7(b) gives the power sweep at a drain bias of 34 V with a linear gain of 18.22 dB. A maximum P_out of 30.61 dBm achieved at P_in = 18.52 dBm with an associated power gain of 12.09 dB and PAE of 46.67%, the gain compression being 6 dB. The saturated output power density is 5.75 W/mm.

Fig. 7(c) indicates the power sweep at a drain bias of 40 V with a linear gain of 18.19 dB. A maximum P_out of 30.94 dBm achieved at P_in = 19.00 dBm with an associated power gain of 11.94 dB and PAE of 39.56%, the gain compression being 6 dB. The saturated output power density is 6.21 W/mm.

In Fig. 8, the obtained P_out, power gain, PAE and drain efficiency, are depicted as a function of V_DS, during the measurement, the P_in was fixed to 18 dBm, and the V_GS was fixed in –3.5 V. The output power and power gain increase with increasing V_DS, from 30.15 to 30.71 dBm, and 12.15 to 12.70 dB, respectively. The PAE and drain efficiency decrease with increasing V_DS from 50.43% to 39.94%, and 54.35% to 42.21%, respectively.

For an ideal HEMT in class-AB operation, the DC and the corresponding fundamental current components of the output current waveform can be calculated by Fourier analysis according to^[31] yielding:

$ {I_{\rm{DC}}} = \frac{{{I_{{\rm{Dmax}} }}}}{{2\pi }} \cdot \frac{{2 \, \sin (\alpha /2) - \alpha \, \cos (\alpha /2)}}{{1 - \cos (\alpha /2)}}, $  (3)

$ {I_1} = \frac{{{I_{{\rm{Dmax}} }}}}{{2\pi }} \cdot \frac{{\alpha - \sin \alpha }}{{1 - \cos (\alpha /2)}}, $  (4)

where α is the conduction angle.

The maximum output power can be calculated according to the following formula:

$ {P_{\rm{out}}} = \frac{1}{8}\left( {\Delta I \cdot \Delta V} \right), $  (5)

where ∆I = 2I₁ and ∆V = 2(V_DS − V_K) are the RF current swing and voltage swing. This predicts a possible output power density provided that an ultimate thermal management is properly done. For the devices fabricated by us, the V_K extracted from the DC output characteristics is 4.2 V, and the I_Dmax was obtained to be 1039.60 mA/mm at a gate bias of 2.0 V. The conduction angle was calculated to be 105.83°. From the formulas above it is easy to know the possible output power and maximum drain efficiency (η_D) corresponding to different V_DS from 28 to 40 V. The calculated results are given in Table 3, showing that with increasing the V_DS, both the DC power supply and the output fundamental power as well as the maximum η_D will increase.

The η_D almost keeps constant at about 62.8% with a slightly increase when V_DS increases from 28 to 40 V. If the V_K = 0 V, the calculated maximum η_D will be 71.87% being constant for all V_DS. The calculated maximum output power is 6.53, 8.17 and 9.82 W/mm, respectively, when V_DS are 28, 34 and 40 V. However, our measured output power at the corresponding V_DS are 5.66, 5.71 and 6.21 W/mm, respectively, as shown in Fig. 7 and Table 2. It is evident that the higher the V_DS, the more difference between the ideal maximum output power and the measured output power at a power gain compression of 6 dB. The most evident is that the measured maximum η_D is much lower than the calculated counterpart and they decrease faster and faster with increasing the V_DS, implying that the decrease of the measured η_D is correlated to the increase of the V_DS, which therefore make the output power at V_DS = 40 V nearly the same as that of V_DS = 28 V.

The above calculation is based on an important condition that both the RF current swing ∆I and the V_K are constants while changing the V_DS. When this condition is not satisfied, the change of the ideal maximum output power density with V_DS will not be linear.

One of the main limiting factors to high performance in GaN HEMTs is the current collapse or DC-to-RF dispersion caused by trapping effects^{[15, 16]}. The effects of current collapse can be assessed with PIV measurements. To explore why increase in output power is lower than the expected when the V_DS increased from 28 to 40 V, the device performance under different quiescent bias were investigated using the PIV measurement method. Each test pulse period consists of a 1 μs on-state pulse, followed by a 999 μs off-state pulse (0.1% duty cycle) at the quiescent bias point Q (V_GSQ, V_DSQ). Here, three quiescent points are adopted, as shown in Fig. 9. (a) Q₀: negligible electron trapping with (V_GSQ0, V_DSQ0) = (0 V, 0 V); (b) Q₁: gate stress with (V_GSQ1, V_DSQ1) = (–8 V, 0 V); (c) Q₂: gate and drain stress with (V_GSQ2, V_DSQ2) = (–8 V, 12 V). The measured PIV results are shown in Fig. 9. The on-resistance R_on under different Q has been extracted, and the V_K is estimated with reference^[32]. At the quiescent bias point of Q₂, the current collapse degradation is about 5.9%.

Fig. 9 shows there exist trapping effects in our devices and gives an idea of the amount of trapping in the structure. The R_on increase is obvious in large V_DS stress and inconspicuous in large V_GS bias, and the output current I_DS also decrease under the influence of stress. As a result, large V_DS stress leads to an increase in V_K and decrease in I_DS. Moreover, with further increase of V_DS stress, the current collapse will become more serious^{[15, 16]}. According to Eq. (5), the increase of V_K and the decrease of I_DS will lead to the degradation of power characteristics of the device under large V_DS bias.

The power and efficiency performance of an AlGaN/GaN HEMT is mainly limited due to the following factors: (a) Knee voltage V_K; (b) Drain leakage current I_min; (c) Current collapse or DC-to-RF dispersion ΔI_DC-RF; (d) Feedback; (e) Compression behavior; (f) Thermal effects and reliability. Taking all these factors from (a) to (e) into consideration, the realizable power-added efficiency amounts can be estimated by^[33]:

$\begin{array}{l} \rm{PAE} = {\eta _{\rm{D}}} \cdot \dfrac{1}{{1 + {V_{\rm{K}}}/{V_{\rm{DC}}}}} \cdot \dfrac{1}{{1 + {I_{{\rm{min}}}}/{I_{\rm{DC}}}}} \cdot \dfrac{1}{{1 + \Delta {I_{\rm{DC-RF}}}/{I_{\rm{DC}}}}} \\ \quad\qquad\times\left( {1 - {\omega ^2}C_{\rm{GD}}^2 + {R_{\rm{GD}}}{R_{\rm{L}}}} \right)\left( {1 - \dfrac{1}{G}} \right), \end{array}$  (6)

PAE is mainly determined by the V_K and ΔI_DC-RF/I_DC. The V_K has a deep impact on the PAE behavior of a transistor due to the fact that it will always be a significant percentage of the DC supply^[31]. The RF V_K increases with increasing V_DS^[34]. The current collapse at high V_DS also lead to reduced load-pull measurement results of output power and PAE^[35]. Therefore, we believe that for our devices the decrease of the maximum PAE with increasing the V_DS is mainly caused by trapping effects and that the output power at V_DS = 40 V is nearly the same as that of V_DS = 28 V is because the DC-to-RF dispersion is more severe at high V_DS. Although the DC-to-RF dispersion still exists in our devices, by using the state-of-the-art HEMT structural materials, surface passivation technology and field plate, HEMTs with high gain and high efficiency were achieved. The origin of the related traps in the devices will be further investigated in detail.

We have grown state-of-the-art AlGaN/GaN HEMT structure materials on 4-inch SI 4H-SiC substrates and fabricated X-band HEMT microwave power devices of 0.45-μm gate length with high linear power gain of 17.04 dB and high power-added-efficiency of 50.56% at 8 GHz when drain biased at 28 V in class-AB operation. The 2DEG mobility and concentration of the HEMT structure were measured to be 2291.1 cm²/(V·s) and 9.954 × 10¹² cm^–2, respectively. A low average R_sh of 301.6 Ω/square with uniformity of 1.64% is achieved. For the fabricated HEMT devices, DC and PIV drain saturation current density are 1039.60 and 1086.35 mA/mm, and the peak extrinsic transconductances are obtained to be 226.70 and 229.70 mS/mm at a gate bias of –3.0 V, respectively. The f_T and f_max of the device were measured to be 30.89 and 38.71 GHz, respectively. Large R_G is one of the possible reasons responsible for the low f_max/f_T ratio of 1.253. When device drain was biased at 28, 34 and 40 V and gate at –3.5 V in class-AB, our measured output power density of the device without cooling is 5.66, 5.71 and 6.21 W/mm, with power gains and PAEs of 11.00 dB and 50.56%, 12.09 dB and 46.67%, and 11.94 dB and 39.56%, respectively. The measured output power densities are lower than the ideally expected maximum output power of 6.53, 8.17 and 9.82 W/mm at corresponding drain–source biases, due to the effects of possibly existing traps in the HEMTs on RF knee voltage and maximum output current with increasing drain–source bias. Although the DC-to-RF dispersion still exists in our devices, by using the state-of-the-art HEMT structural materials, surface passivation technology and field plate, HEMTs with high gain and high efficiency were achieved.

We would like to thank Prof. Xiaodong Wang for providing the experimental conditions, and Dr. Wei Yan and Mr. Desong Wang for their help in EBL and optical lithography. This work was supported by the National Key Research and Development Program of China (2017YFB0402900), the Key-Area Research and Development Program of Guangdong Province (2019B010126001), the Natural Science Foundation for Distinguished Young Scholars of Shandong Province (ZR2019JQ01), the National Natural Sciences Foundation of China (62074144, 52022052, 62004118), Key R & D plan of Shandong Province (2019JMRH0901, 2019JMRH0201), the Natural Science Foundation of Shandong Province (ZR2019BEM030, ZR2019BEM011).