• Journal of Semiconductors
  • Vol. 41, Issue 10, 102801 (2020)
Xiaorong Luo1, Ke Zhang1, Xu Song1, Jian Fang1, Fei Yang2, and Bo Zhang1
Author Affiliations
  • 1State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China
  • 2Global Energy Interconnection Research Institute, Beijing 102209, China
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    DOI: 10.1088/1674-4926/41/10/102801 Cite this Article
    Xiaorong Luo, Ke Zhang, Xu Song, Jian Fang, Fei Yang, Bo Zhang. 4H-SiC trench MOSFET with an integrated Schottky barrier diode and L-shaped P+ shielding region[J]. Journal of Semiconductors, 2020, 41(10): 102801 Copy Citation Text show less

    Abstract

    A novel 4H-SiC trench MOSFET is presented and investigated by simulation in this paper. The device features an integrated Schottky barrier diode and an L-shaped P+ shielding region beneath the gate trench and aside one wall of the gate trench (S-TMOS). The integrated Schottky barrier diode works as a free-wheeling diode in reverse recovery and reverse conduction, which significantly reduces reverse recovery charge (Qrr) and reverse turn-on voltage (VF). The L-shaped P+ region effectively shields the coupling of gate and drain, resulting in a lower gate–drain capacitance (Cgd) and date–drain charge (Qgd). Compared with that of conventional SiC trench MOSFET (C-TMOS), the VF and Qrr of S-TMOS has reduced by 44% and 75%, respectively, with almost the same forward output current and reverse breakdown voltage. Moreover, the S-TMOS reduces Qgd and Cgd by 32% and 22%, respectively, in comparison with C-TMOS.
    $ {P_{\rm{t}}} = k{R_{{\rm{on,sp}}}}{I_{\rm{d}}}^2 + f\left( {{E_{{\rm{on}}}} + {E_{{\rm{off}}}}} \right), $ ()

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    Xiaorong Luo, Ke Zhang, Xu Song, Jian Fang, Fei Yang, Bo Zhang. 4H-SiC trench MOSFET with an integrated Schottky barrier diode and L-shaped P+ shielding region[J]. Journal of Semiconductors, 2020, 41(10): 102801
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