Fig. 1. (Color online) (a) False-color scanning electron microscopy (SEM) image of an overlapping-gate Si QD. (b) Energy level arrangement for Elezerman readout and Pauli spin blockade readout. (c) Dual nested gate integration of Si QDs using fin field-effect transistor (FinFET) technology. (d) SEM image of a two dimensional array of Si QDs using fully-depleted silicon-on-insulator transistor (FD-SOI) technology.