• Microelectronics
  • Vol. 52, Issue 1, 87 (2022)
CHEN Long1, LI Jian’er2, LIAO Nan3, XU Yingsen4, FENG Yong2, LIU Jizhi1, XU Kaikai1, and ZHAO Jianming1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
  • 4[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.210227 Cite this Article
    CHEN Long, LI Jian’er, LIAO Nan, XU Yingsen, FENG Yong, LIU Jizhi, XU Kaikai, ZHAO Jianming. A LVTSCR with High Holding Voltage[J]. Microelectronics, 2022, 52(1): 87 Copy Citation Text show less
    References

    [4] DO K, KOO Y. A new SCR structure with high holding voltage and low on-resistance for 5-V applications [J]. IEEE Trans Elec Dev, 2020, 67(3): 1052-1058.

    [5] KER M D, HSU K C. Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits [J]. IEEE Trans Dev Mater Reliab, 2005, 5(2): 235-249.

    [6] DONG S R, WU J, MIAO M, et al. High-holding-voltage silicon-controlled rectifier for ESD applications [J]. IEEE Elec Dev Lett, 2012, 33(10): 1345-1347.

    [7] VASHCHENKO V A, CONCANNON A, BEEK M T, et al. High holding voltage cascoded LVTSCR structures for 5.5-V tolerant ESD protection clamps [J]. IEEE Trans Dev Mater Reliab, 2004, 4(2): 273-280.

    [9] CHATTERJEE A, POLGREEN T. A low-voltage triggering SCR for on-chip ESD protection at output and input pads [J]. IEEE Elec Dev Lett, 1991, 12(1): 21-22.

    CHEN Long, LI Jian’er, LIAO Nan, XU Yingsen, FENG Yong, LIU Jizhi, XU Kaikai, ZHAO Jianming. A LVTSCR with High Holding Voltage[J]. Microelectronics, 2022, 52(1): 87
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