Using the highly sensitive detection ability of avalanche photoelectricity to weak photon signals, the time of flight can be detected which is obtained after the active laser light source is reflected by the target object. The spatial distance distribution of the measured object, namely the depth of scene information, can be obtained, and the geometric contour image of the target object can be reproduced through relevant algorithms. This Laser Detection and Ranging system composed of APD and readout integrated circuit has the advantages of small size, fast detection rate, high sensitivity, strong anti-interference ability, and is widely used in laser radar, quantum communication, map construction, safe distance detection, unmanned navigation and other fields. With the continuous expansion of the scale of SPAD array and the complexity of application scenarios, higher requirements are put forward for the performance of ROIC. This design focuses on high-precision resolution under low-power constraints. Based on the detailed analysis of the mutual constraints of ROIC array precision, range, area and power consumption, the controllable built-in GRO high-frequency clock drive pixel architecture and event-driven operation mode are adopted to reduce the system power consumption and meet the application requirements of short-range and high-precision ranging imaging.The readout integrated circuit for high-precision imaging is established. The ROIC array architecture selects the TDC fully built-in structure, which has unique advantages such as small nonlinearity and good clock phase-splitting uniformity, and eliminates many problems caused by the long-distance routing of polyphase high-frequency clock signals (Fig.1). At the same time, in order to reduce the power consumption, the quantization timing adopts the event-driven quantization method (Fig.3). In order to further pursue higher resolution at rated frequency, the TDC circuit adopts a two-stage structure (Fig.4). In order to ensure clock uniformity and low jitter clock, an external PLL driver with built-in GRO is used to provide the required clock signal (Fig.5).The packaging and related testing of the samples prepared by the MPW chip are completed using the test instrument provided by the laboratory. The PLL outside the array and the GRO inside the pixel meet the requirements, and the GRO function also meets the requirements (Fig.7). The quantization function and performance of the array are tested, the average resolution of TDC is 102 ps (Fig.8). After evaluating the linearity of pixel TDC, the test results show that the differential nonlinearity of TDC array is not greater than 0.8 LSB, and the integral nonlinearity is not greater than 1.3 LSB (Fig.9). The uniformity of TDC array pixels is tested, and the test results show that the total relative deviation is within ± 0.65%, which indicates that the clock frequency and phase generated by each pixel GRO are different (Fig.10). Compared with similar design schemes at home and abroad, the high-precision TDC array designed can obtain larger range with the same accuracy (Tab.1).In this study, a readout integrated circuit based on built-in clock is designed. The performance of the readout circuit is tested using the test instrument provided by the laboratory. The resolution of the readout circuit is 102 ps, the differential nonlinearity of the pixel TDC is not more than 0.8 LSB, the integral nonlinearity is not more than 1.3 LSB, and the total relative deviation of the uniformity of the TDC array pixel is within ± 0.65%. By testing the performance of the readout circuit, for the sparse photon detection application environment, the circuit can meet the application requirements of short-range and high-precision, and provide stable imaging function for short-range detection.