• Journal of Semiconductors
  • Vol. 43, Issue 8, 082801 (2022)
Tongtong Yang1, Yan Wang1、2、*, and Ruifeng Yue1、2
Author Affiliations
  • 1School of Integrated Circuits, Tsinghua University, Beijing 100084, China
  • 2Beijing National Research Center for Information Science and Technology, Beijing 100084, China
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    DOI: 10.1088/1674-4926/43/8/082801 Cite this Article
    Tongtong Yang, Yan Wang, Ruifeng Yue. Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique[J]. Journal of Semiconductors, 2022, 43(8): 082801 Copy Citation Text show less
    References

    [1] R C Murphree, S Roy, S Ahmed et al. A SiC CMOS linear voltage regulator for high-temperature applications. IEEE Trans Power Electron, 35, 913(2020).

    [2] L Lanni, B G Malm, M Östling et al. 500 °C bipolar integrated OR/NOR gate in 4H-SiC. IEEE Electron Device Lett, 34, 1091(2013).

    [3] A S Kashyap, C P Chen, R Ghandi et al. Silicon carbide integrated circuits for extreme environments. The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications, 60(2013).

    [4] J Y Lee, S Singh, J A Cooper. Demonstration and characterization of bipolar monolithic integrated circuits in 4H-SiC. IEEE Trans Electron Devices, 55, 1946(2008).

    [5] K Sheng, Y X Zhang, M Su et al. Demonstration of the first SiC power integrated circuit. Solid State Electron, 52, 1636(2008).

    [6] M Alexandru, V Banu, X Jorda et al. SiC integrated circuit control electronics for high-temperature operation. IEEE Trans Ind Electron, 62, 3182(2015).

    [7] S H Ryu, K T Kornegay, J A Cooper et al. Digital CMOS IC's in 6H-SiC operating on a 5-V power supply. IEEE Trans Electron Devices, 45, 45(1998).

    [8] M Okamoto, A Yao, H Sato et al. First demonstration of a monolithic SiC power IC integrating a vertical MOSFET with a CMOS gate buffer. 2021 33rd International Symposium on Power Semiconductor Devices and ICs, 71(2021).

    [9] R H Huang, Y H Tao, S Bai et al. Design and fabrication of a 3.3 kV 4H-SiC MOSFET. J Semicond, 36, 094002(2015).

    [10] G D Licciardo, L di Benedetto, S Bellone. Modeling of the SiO2/SiC interface-trapped charge as a function of the surface potential in 4H-SiC vertical-DMOSFET. IEEE Trans Electron Devices, 63, 1783(2016).

    [11] T T Yang, X B Li, Y Wang et al. Design and fabrication of 860V SiC trench MOSFET with stripe and rectangular cells. 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, 161(2021).

    Tongtong Yang, Yan Wang, Ruifeng Yue. Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique[J]. Journal of Semiconductors, 2022, 43(8): 082801
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