Silicon-based FMCW signal generators: A review

Wei Deng; Haikun Jia; Baoyong Chi

doi:10.1088/1674-4926/41/11/111401

[1] J Park, H Ryu, K W Ha et al. 76–81-GHz CMOS transmitter with a phase-locked-loop-based multichirp modulator for automotive radar. IEEE Trans Microw Theory Tech, 63, 1399(2015).

[2]

[3] W L Chan, J R Long. A 60-GHz band 2 × 2 phased-array transmitter in 65-nm CMOS. IEEE J Solid-State Circuits, 45, 2682(2010).

[4] J H Song, C L Cui, S K Kim et al. A low-phase-noise 77-GHz FMCW radar transmitter with a 12.8-GHz PLL and a ×6 frequency multiplier. IEEE Microw Wirel Compon Lett, 26, 540(2016).

[5] R Feger, C Pfeffer, A Stelzer. A frequency-division MIMO FMCW radar system based on delta–sigma modulated transmitters. IEEE Trans Microw Theory Tech, 62, 3572(2014).

[6] T Fujibayashi, Y Takeda, W H Wang et al. A 76- to 81-GHz multi-channel radar transceiver. IEEE J Solid-State Circuits, 52, 2226(2017).

[7] H K Jia, L X Kuang, W Zhu et al. A 77 GHz frequency doubling two-path phased-array FMCW transceiver for automotive radar. IEEE J Solid-State Circuits, 51, 2299(2016).

[8]

[9]

[10] W Deng, R Wu, Z J Chen et al. A 35-GHz TX and RX front end with high TX output power for Ka-band FMCW phased-array radar transceivers in CMOS technology. IEEE Trans VLSI Syst, 28, 2089(2020).

[11] T K Ma, W Deng, Z P Chen et al. A CMOS 76–81-GHz 2-TX 3-RX FMCW radar transceiver based on mixed-mode PLL chirp generator. IEEE J Solid-State Circuits, 55, 233(2020).

[12] H H Chang, I H Hua, S I Liu. A spread-spectrum clock generator with triangular modulation. IEEE J Solid-State Circuits, 38, 673(2003).

[13] Y B Hsieh, Y H Kao. A fully integrated spread-spectrum clock generator by using direct VCO modulation. IEEE Trans Circuits Syst I, 55, 1845(2008).

[14]

[15]

[16] T Mitomo, N Ono, H Hoshino et al. A 77 GHz 90 nm CMOS transceiver for FMCW radar applications. IEEE J Solid-State Circuits, 45, 928(2010).

[17] Y Kim, T J Reck, M Alonso-Delpino et al. A Ku-band CMOS FMCW radar transceiver for snowpack remote sensing. IEEE Trans Microw Theory Tech, 66, 2480(2018).

[18] J Lee, Y A Li, M H Hung et al. A fully-integrated 77-GHz FMCW radar transceiver in 65-nm CMOS technology. IEEE J Solid-State Circuits, 45, 2746(2010).

[19] M Kokubo, T Kawamoto, T Oshima et al. Spread-spectrum clock generator for serial ATA using fractional PLL controlled by delta-sigma modulator with level shifter. 2005 IEEE Int Dig Tech Pap Solid-State Circuits Conf, 160(2005).

[20]

[21] Z K Shen, H Y Jiang, H Y Li et al. A 12-GHz calibration-free all-digital PLL for FMCW signal generation with 78 MHz/μs chirp slope and high chirp linearity. IEEE Trans Circuits Syst I, 1(2020).

[22] H J Ng, M Kucharski, W Ahmad et al. Multi-purpose fully differential 61- and 122-GHz radar transceivers for scalable MIMO sensor platforms. IEEE J Solid-State Circuits, 52, 2242(2017).

[23] G Hasenaecker, M van Delden, T Jaeschke et al. A SiGe fractional-N frequency synthesizer for mm-wave wideband FMCW radar transceivers. IEEE Trans Microw Theory Tech, 64, 847(2016).

[24] N Pohl, T Jaeschke, K Aufinger. An ultra-wideband 80 GHz FMCW radar system using a SiGe bipolar transceiver chip stabilized by a fractional-N PLL synthesizer. IEEE Trans Microw Theory Tech, 60, 757(2012).

[25] T N Luo, C H E Wu, Y J E Chen. A 77-GHz CMOS FMCW frequency synthesizer with reconfigurable chirps. IEEE Trans Microw Theory Tech, 61, 2641(2013).

[26]

[27] J X Wu, W Deng, Z P Chen et al. A 77-GHz mixed-mode FMCW generator based on a vernier TDC with dual rising-edge fractional-phase detector. IEEE Trans Circuits Syst I, 67, 60(2020).

[28] D Cherniak, L Grimaldi, L Bertulessi et al. A 23-GHz low-phase-noise digital bang–bang PLL for fast triangular and sawtooth chirp modulation. IEEE J Solid-State Circuits, 53, 3565(2018).

[29] Q X Shi, K Bunsen, N Markulic et al. A self-calibrated 16-GHz subsampling-PLL-based fast-chirp FMCW modulator with 1.5-GHz bandwidth. IEEE J Solid-State Circuits, 54, 3503(2019).

[30] D Cherniak, C Samori, R Nonis et al. PLL-based wideband frequency modulator: Two-point injection versus pre-emphasis technique. IEEE Trans Circuits Syst I, 65, 914(2018).

[31]

[32] X Gao, E A M Klumperink, M Bohsali et al. A low noise sub-sampling PLL in which divider noise is eliminated and PD/CP noise is not multiplied by N². IEEE J Solid-State Circuits, 44, 3253(2009).

[33] A T Narayanan, M Katsuragi, K Kimura et al. A fractional-N sub-sampling PLL using a pipelined phase-interpolator with an FoM of –250 dB. IEEE J Solid-State Circuits, 51, 1630(2016).

[34] W H Wu, R B Staszewski, J R Long. A 56.4-to-63.4 GHz multi-rate all-digital fractional-N PLL for FMCW radar applications in 65 nm CMOS. IEEE J Solid-State Circuits, 49, 1081(2014).

[35]

[36] J F Lin, Z Song, N Qi et al. A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector. IEEE J Solid-State Circuits, 53, 2850(2018).

[37] S Levantino, G Marzin, C Samori. An adaptive pre-distortion technique to mitigate the DTC nonlinearity in digital PLLs. IEEE J Solid-State Circuits, 49, 1762(2014).

[38] N Markulic, K Raczkowski, E Martens et al. A DTC-based subsampling PLL capable of self-calibrated fractional synthesis and two-point modulation. IEEE J Solid-State Circuits, 51, 3078(2016).

[39] C W Yao, R H Ni, C Lau et al. A 14-nm 0.14-ps_rms fractional-N digital PLL with a 0.2-ps resolution ADC-assisted coarse/fine-conversion chopping TDC and TDC nonlinearity calibration. IEEE J Solid-State Circuits, 52, 3446(2017).

[40] G Marzin, S Levantino, C Samori et al. A 20 Mb/s phase modulator based on a 3.6 GHz digital PLL with −36 dB EVM at 5 mW power. IEEE J Solid-State Circuits, 47, 2974(2012).

[41] J Vovnoboy, R Levinger, N Mazor et al. A dual-loop synthesizer with fast frequency modulation ability for 77/79 GHz FMCW automotive radar applications. IEEE J Solid-State Circuits, 53, 1328(2018).