• Acta Optica Sinica
  • Vol. 39, Issue 5, 0504001 (2019)
Bo Wang1、*, Liheng Wang1, Weixin Liu1, Zebin Kong1, Yudong Li2, Zhen Li1, Kunshu Wang1, Weiming Zhu1, and Ming Xuan1
Author Affiliations
  • 1 Device Reliability Assurance Department, No.808 Institute of the Eighth Academy of China Aerospace Science and Technology Corporation, Shanghai 201109, China
  • 2 Radiation Effect Laboratory, Xinjiang Technical Institute of Physics and Chemistry, Chinese Academy of Sciences, Urumqi, Xinjiang 830011, China
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    DOI: 10.3788/AOS201939.0504001 Cite this Article Set citation alerts
    Bo Wang, Liheng Wang, Weixin Liu, Zebin Kong, Yudong Li, Zhen Li, Kunshu Wang, Weiming Zhu, Ming Xuan. Single-Event Upset and Damage Mechanism in 8T-Global Shutter CMOS Image Sensors[J]. Acta Optica Sinica, 2019, 39(5): 0504001 Copy Citation Text show less
    Block diagram of CMV4000 image sensor
    Fig. 1. Block diagram of CMV4000 image sensor
    Cross-sectional diagram of 8T pixel unit
    Fig. 2. Cross-sectional diagram of 8T pixel unit
    SEU diagram of standard 6T structure SRAM storage unit after exposure to heavy-ion irradiation[13]
    Fig. 3. SEU diagram of standard 6T structure SRAM storage unit after exposure to heavy-ion irradiation[13]
    Block diagram of 8T-global exposure CIS single-particle online detection system
    Fig. 4. Block diagram of 8T-global exposure CIS single-particle online detection system
    Abnormal images after SEU in offset register. (a) Nth; (b) (N+1)th; (c) (N+2)th
    Fig. 5. Abnormal images after SEU in offset register. (a) Nth; (b) (N+1)th; (c) (N+2)th
    Three-dimensional stereograms of image abnormal mode after SEU in offset register. (a) Nth; (b) (N+1)th; (c) (N+2)th
    Fig. 6. Three-dimensional stereograms of image abnormal mode after SEU in offset register. (a) Nth; (b) (N+1)th; (c) (N+2)th
    Image abnormal mode after SEU in LVDS output register
    Fig. 7. Image abnormal mode after SEU in LVDS output register
    Image abnormal mode after SEU in row-decoder address decoder
    Fig. 8. Image abnormal mode after SEU in row-decoder address decoder
    Image abnormal mode after SEU in output clock register
    Fig. 9. Image abnormal mode after SEU in output clock register
    Working diagram of 8-channel LVDS. (a) Reading out line by line for LVDS; (b) pixel output line coordinate corresponding to each LVDS
    Fig. 10. Working diagram of 8-channel LVDS. (a) Reading out line by line for LVDS; (b) pixel output line coordinate corresponding to each LVDS
    Timing diagram of 10-bit pixel output
    Fig. 11. Timing diagram of 10-bit pixel output
    Schematic of corrupted code for 10-bit pixel output
    Fig. 12. Schematic of corrupted code for 10-bit pixel output
    Ion specieIncident angleRange /μmLET /(MeV·cm2·mg-1)Experimental environment
    16OVertical95.23.1Vacuum tank
    27SiVertical50.79.3Vacuum tank
    35ClVertical42.813.4Vacuum tank
    48TiVertical32.922.2Vacuum tank
    74GeVertical29.9537.37Vacuum tank
    Table 1. Ion information for heavy-ion irradiation tests
    Ion specieLET /(MeV·cm2·mg-1)Flux /(ion·cm-2·s-1)Fluence /(106 ion·cm-2)Number of SEUσ /(cm2·device-1)
    16O3.120001.500
    27Si9.320001.33772.9×10-4
    35Cl13.420003.638491.07×10-3
    48Ti22.220000.7680741.06×10-2
    74Ge37.3720001130621.3×10-2
    Table 2. CIS SEU test data
    Register nameFunctional descriptionAbnormal image representationLET /(MeV·cm2·mg-1)
    Offset registerFor pixel dark signal correctionOutput image of "always zero"9.3
    LVDS registerControl pixel output channelLVDS output channel severaladjacent column output exception13.4,22.2,37.37
    Row-decoder registerRow address addressing, controllingline pixel exposure and readoutSome zero row outputs13.4,22.2,37.37
    Output clock registerEnsuring alignment with deviceclock and 10-bit pixel codevalue output in turnWhole image messy code22.2,37.37
    Table 3. Image abnormal modes caused by SEU
    Register nameRegister addressDefault of gray valueRegister function description
    Offset register100-10116323Value in this register defining dark signal correction appliedto pixel output signal (minimum is 0, maximum is 16383)
    Table 4. Original setting of CMV4000 offset register
    Bo Wang, Liheng Wang, Weixin Liu, Zebin Kong, Yudong Li, Zhen Li, Kunshu Wang, Weiming Zhu, Ming Xuan. Single-Event Upset and Damage Mechanism in 8T-Global Shutter CMOS Image Sensors[J]. Acta Optica Sinica, 2019, 39(5): 0504001
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