Physical Unclonable Function (PUF), as a circuit structure that can effectively deal with hardware security issues, has received extensive attention in recent years. Among them, the Ring Oscillator (RO) PUF does not require a completely symmetrical wiring method, so it is considered to be one of the most ideal PUF structures. However, the existing RO PUF design is more complicated and requires "hard macros" to fix the circuit, which results in poor portability of PUF. A RO PUF was implemented by using the inherent carry logic resources in FPGA in this paper. By cascading 11 XOR gates in 3 carry logics, the 11th-order oscillation ring was configured to solve the problem of portability and to avoid the use of "hard macros" to fix the circuit. The proposed structure was tested by using Xilinx Spartan-6. Experimental results showed that the proposed RO PUF achieved an uniformity of 50.65%, an uniqueness of 48.48% and a bit error rate of 1.56%. At the same time, this design had the characteristics of easy implementation, single resource occupation, and no manual layout.