
- Journal of Semiconductors
- Vol. 41, Issue 10, 101301 (2020)
Abstract
1. Introduction
With the rapid popularization of personal computers and smartphones, the construction of 5G networks, cloud services, the Internet, and the Internet of Things, global data traffic and the consumption of information and communications technology (ICT) are explosively increasing (as shown in Fig. 1). In the short span of more than a decade in the 21st century, global data traffic has reached the ZB scale and it is predicted to continue to grow exponentially in the coming years. A recent white paper published by IDC forecasts that the global datasphere will grow up to 175ZB in 2025 from 33ZB in 2018[
Figure 1.(Color online) Forecast of global data traffic and electricity in ICT[
So far, the development of semiconductor electronic integrated circuits (IC) has basically followed Moore's Law to improve computing and storage capacity by reducing the size of transistors, optimizing the device’s structure, and increase integration. Nowadays, DCs and supercomputers use parallel operation technology: parallel processing or computing with multiple processors to improve the performance that cannot be achieved with a single processor. However, based on the existing microelectronic material system and operating principle, the transmission bandwidth of traditional copper interconnection is close to its physical limit. This makes the processing speed of chip processors much faster than the data exchange speed of the copper interconnections between the chips. Thus, the parallel processing capability between chips is restricted[
The performance of copper links in high-speed interconnection has reached its physical limit, thus a new generation of high-speed short-distance interconnection technology needs to be developed. Optical transmission has the characteristics of high bandwidth, low delay, low power consumption, low transmission loss, low crosstalk and strong spatial multiplexing capability, and has been recognized as the successor of copper links[
However, traditional photonic integrated circuit (PIC) manufacturing processes are complex because many functional photonic components are based on different material systems. For example, laser diodes (LDs) are mainly based on InP[
Silicon photonic chips have shown great potential as a new large-scale optoelectronic integrated chips because they combine low cost, large scale, high integration and reliability of mature complementary metal oxide semiconductor (CMOS) process with high bandwidth, low latency, low power consumption and strong spatial multiplexing of optical interconnects. Si is well known for its extremely low loss waveguides and various passive components, as follows:
(1) Si is a cheap and stable material. It is used to produce 300-mm large-scale wafers and the silicon-based waveguide manufacture is compatible with CMOS process. Thus, it can be integrated with CMOS electronic circuits.
(2) Si has an ultra-low material absorption coefficient at communication wavelengths.
(3) Si has an ideal oxide SiO2 with extremely low optical loss and high electrical isolation. Si waveguides have the high refractive index contrast in both horizontally and vertically on silicon-on-insulator (SOI) substrates. The curved waveguide is able to have a small radius to make the optical devices more compact and then reduce the overall PIC package area.
In addition to the monolithically integrating Si waveguides, spot-size converters (SSCs)[
However, because Si is an indirect bandgap semiconductor with low emission efficiency, it is difficult to be used as an efficient and reliable light source for silicon photonic integrated chips. Researchers proposed to dope with impurities to improve internal quantum efficiency, such as erbium doped silicon which uses Er3+ as the atomic luminescence center[
Simultaneously, it has been proposed to introduce high-gain III–V semiconductors on Si substrates to fabricate efficient LDs[
Until now, three schemes have been widely used to realize III–V high-efficiency edge emitting LDs on Si:
(1) Hybrid integration or flip-chip bonding[
(2) Heterogeneous integration or wafer-bonding[
(3) Direct hetero-epitaxial integration[
2. Silicon photonics main optical components
The overall performance improvement of a silicon photonic transceiver depends on the performance breakthrough of each optical component. The modulation speed of the active component is a main factor limiting the single-channel bandwidth. Additionally, multiplexers (MUXs) and demultiplexers (DEMUXs) also boost the total speed of a transceiver in wavelength division multiplexing (WDM). Therefore, improving the performance of silicon photonic optical components is a popular research topic for silicon photonic transceivers.
2.1. Laser diode (LD)
At present, there are three mainstream coupling methods for integrated III–V/Si lasers: 1) lens coupling[
2.1.1. Lens coupling
Luxtera's products rely on an externally packaged light source that is called the LaMP. This is a mature InP-based laser diode co-packaged with an optical isolator and a lens, as shown in Fig. 2(a)[
Figure 2.(Color online) Three coupling modes of silicon-based III–V lasers: (a) lens coupling[
2.1.2. Edge coupling
In contrast with an off-chip light source, the on-chip light source is more suitable for large-scale integration in practice situations because it does not need optical connector or introduce polarization. In Ref. [32], a 13-channel LD array is mounted on a Si waveguide platform with solder bumps by flip-chip bonding. The LD array faces the SiON waveguides facet to couple the light into them by edge coupling, as shown in Fig. 2(b). The SiON waveguides have a core section size of 2.5 × 2.5 μm2, and inversely tapered SSCs are used to transfer the optical mode into the Si optical waveguides with a core section size of 440 nm wide and 220 nm high. The alignment marks placed on the LD and the mounting stage are capable of highly accurate horizontal positioning, and the Si pedestals are also capable of highly accurate vertical positioning. An output power of up to 100 mW and good heat dissipation have been achieved by this method[
2.1.3. Evanescent coupling
Evanescent coupling avoids the alignment error by using established lithography techniques and it does not introduce SSC, which was firstly demonstrated in 2006[
2.1.4. Quantum dot laser on Si substrate
In 1982, Arakawa et al. proposed that, due to the three-dimensional quantum confinement of carriers, QD materials have a δ-function-like density of states[
Figure 3.(Color online) Comparison of typical power–current characteristics of FP lasers. QD-LD (left) is insensitive to temperature and has an almost constant threshold current and slope efficiency. Other two pictures (right two) show the characteristics of two typical QW-LDs[
Direct hetero-epitaxy of InAs/GaAs QD-LDs on Si is currently the most promising solution of monolithic integrated light sources on Si[
Figure 4.(a) TEM image of GaAs/Si interface generating a large number of dislocations[
Another advantage of QD-LDs on Si is that it has been proven to be defect-insensitive when compared to bulk material LDs and QW-LDs[
Figure 5.(Color online) (a) Schematic and TEM images of interaction between QDs and TDs[
At present, the threshold current density of the QD-LDs epitaxially grown on Si substrates can be reduced to 62.5 A/cm2, and the output power at 120 °C exceeds 105 mW[
Figure 6.(Color online) (a) Diagram of Ridge QD-LD reported by UCL university[
2.2. Modulator
In contrast from the most sensitive LiNbO3 material, monolithic integrated Si-based modulators are based on plasma free carrier effect. The refractive index of a Si waveguide changes by changing the number of free carriers by doping, electrical field methods or optical methods. Fig. 3 shows the three types of Si-based modulators: 1) PIN type, 2) PN-type and 3) MOS-type.
2.2.1. PIN type
In the ridge waveguide PIN modulator, the light field will expand into the flat plates on the two sides. Thicker plates lead to a wider pattern profile, which requires a wider p–n spacing. Thus, it will lead to large resistance, as well as low modulation efficiency and modulation rate. Because the optical modulation characteristics, such as optical mode loss, modulation efficiency, and modulation rate are very sensitive to the thickness of the Si plate, it must be made as an extremely thin when etching. To solve these difficulties, a new structure has been proposed to replace the ridge waveguide, as shown in Fig. 7(a)[
Figure 7.(Color online) Three types of silicon-based modulators: (a) PIN[
2.2.2. PN-type
The PN-type modulator increases the width of the depletion region by applying a reverse bias voltage, at the same time reduces the concentration of carriers near the PN junction. Thereby, the refractive index of the waveguide is changed and the light can be modulated. The carrier drifts extremely fast at strong electric field in the depletion region, leading in a high modulation rate. A 50 Gb/s Si modulator is shown in Fig. 7(b)[
2.2.3. MOS-type
A MOS structure modulator provides both high modulation efficiency and large modulation bandwidth. A very thin gate oxide layer is interposed between the P and N type Si of the ridge waveguide to form a capacitor structure, as shown in Fig. 7(c)[
2.3. Photodetector (PD)
Due to the inherent characteristics of the band structure, Si has low absorption coefficient and long absorption lengths in the near-infrared band, and it especially does not respond to bands above 1.1 μm. Ge material has attracted great attention to make near-infrared PDs with low dark current, high response and absorption wavelength covering 1.3–1.55 μm because Ge has a large carrier mobility and large absorption coefficient among 1.3–1.55 μm. Its band gap in the single crystal state is 0.67 eV. Additionally, because there is a thermal expansion coefficient mismatch between Ge and Si, tensile stress is introduced in Ge when it is directly grown on Si, which further narrows the Ge band gap. The absorption wavelength of Ge can be extended to 1.87 μm[
As shown in Fig. 8(a), researchers in Intel Corp. selectively deposited Ge material on a SOI substrate, which reduces the diffusion length of carriers and lowers the dislocation density[
Figure 8.(Color online) (a) Ridge waveguide PD designed by Intel Corp.[
Kotura company considers the influence of the electrode, so they reduce the width of the electrode, put the electrode away from the center of the Ge waveguide, and also increase the thickness of the Ge material[
A horizontal PIN PD with responsivity up to 1 A/W and 70 GHz bandwidth under –1 V bias has also been reported, as shown in Fig. 8(c)[
2.4. Muiltiplexer and demultiplexer
DC is used because of its ability to increase bandwidth and lower power consumption[
2.4.1. DMZI type
The multistage DMZI type (De) MUX is considered to have advantages of low insertion loss, low crosstalk, and spectral flatness. Widening the waveguide width in the DMZI region is an effective way to reduce refractive index change per unit length and keep the filter spectral wavelength nearly constant, both theoretically and experimentally[
Figure 9.(Color online) (a) Device structures of 1 × 4 Ch optical (De)MUX with different waveguide width[
2.4.2. AWG type
An AWG (De)MUX consists of two parts: two free propagation regions and an array of waveguides with successive increments in length. The spectral response of conventional AWG channel is Gaussian-like, but a flat spectral response is necessary for many WDM applications. Thus, an AWG integrated with a Multimode Interference (MMI) coupler is designed to satisfy this requirement. On SOI substrate, a high refractive index allows us to reduce the size of waveguides and are beneficial for compact design. However, it makes the design of AWG and MMI coupler difficult because the silicon waveguides are sensitive to phase error in the array. In this reference, an optimized design of compact SOI-based 12 channel 400 GHz AWG with MMI is presented[
3. Silicon photonic transceivers
Because of the rapid development of transceiver applied in DC, there has not been sufficient time to establish standards. Thus, although various solutions for short-distance optical links have been developed, they cannot interoperate. Users and customers do not need to care too much as long as the price is cheap. In this section, we introduce two solutions for short-distance optical interconnect links in DC: 1) parallel single-mode, 2) wavelength division multiplexing and two advanced modulation formats: 3) four-level pulse-amplitude modulation, and 4) coherent optical technology.
3.1. Parallel single-mode
Increasing the number of interconnect channels to increase the total bandwidth is one of the current solutions for high-speed interconnection between chips and boards. A successful PIC short-distance multi-channel interconnection solution is parallel single-mode (PSM) technology. This technology contains multiple fibers or waveguides which transmit the identical wavelength light. Small size, low power consumption, high-speed and stable interconnection thus can be achieved.
Due to their temperature-insensitive and low-RIN characteristics, as mentioned earlier, QD-LDs are very suitable as the light source on Si. High-temperature operation is essential to dense integration. The LDs can be assembled with high-temperature LSICs that generate great heat. The output power of conventional QW-LDs decreases sharply with the increase of temperature while the highest operation temperature of a QD-LD has reached 220 °C[
Figure 10.(Color online) (a) Image of athermal Si optical interposer with close-ups of the components. (b) 20 Gb/s eye diagram with continuous temperature change from 25 to 125 °C[
Researchers at AIO Core have demonstrated a fingertip-size optical module, which has received much attention in recent years[
Figure 11.(Color online) (a) Photographs of the transmitter and receiver optical I/O core. (b) Cross section of the transmitter and receiver optical I/O core[
Fig. 12 shows a 400 G high-speed transceiver[
Figure 12.(Color online) Schematic structure of a 16-channel × 25 Gb/s silicon photonic optical transceiver on a package substrate. EIC and PIC are bonded together by solder bumps and mounted on a glass ceramic interposer (GCIP)[
Schematic diagrams of the EIC and PIC chips are shown in Fig. 13. The EIC chip and the PIC chip are directly flip-chip bonded through solder bumps to minimize the wiring length and parasitic capacitance between electronic circuits and photonic circuits. Thus, the attenuation of electrical signals between PD, driver, and modulator are reduced. At the transmitter, 2 × 8 drivers on the EIC control 2 × 8 PN-type MZI modulators on the PIC. Modulators load the electrical signals generated from pseudo random bit sequence (PRBS) on the output from hybrid integrated 4 × 4 array LDs. The light is efficiently coupled into the SSCs by passive alignment, then fed into an array of 16 GCs and finally coupled into 16 single-mode fibers. At the receiver, optical signals from 16 single-mode fibers are coupled into the PIC waveguide through 16 GCs array, and finally are sent into 4 × 4 PIN-type PD array with responsivity of 0.75 A/W at 1550 nm under –2 V reverse bias voltage. All 32 channels can transmit and receive at the same time with a modulation rate of 25 Gb/s per channel. Besides, the channel crosstalk loss is less than 0.1 dB. Therefore, the transceiver module achieved 400 Gb/s error-free (bit-error ratio (BER) < 10 –12) operation.
Figure 13.(Color online) (a) EIC and (b) PIC photographs of a high-density 16-channel optical transceiver[
In Ref. [57], the number of channels is increased by using beam splitters. Multiple divided channels can be modulated and overall bandwidth is improved, as shown in Fig. 14. Two groups of 13-channel array LDs are hybrid integrated on a Si substrate. 26 low optical loss “trident” SSCs, 26 1 × 4 beam splitters, 104 PIN-type modulator array, 104 inter-chip optical waveguides and 104 PIN-type PD array are monolithically integrated. Due to the modulation rate limit of the PIN-type modulator, each channel can achieve a maximum bandwidth of 20 Gb/s. Thus, transceiver of 2.1 Tb/s intra-chips interconnect has been achieved. Because the packaging area of a single channel is 0.0677 mm2, the bandwidth density reaches 30 Tbps/cm2.
Figure 14.(Color online) This silicon interposer integrated the beam splitters to increase the number of interconnect channels[
A multi-source agreement (MSA) is made between multiple manufacturers to fabricate inter-compatible products for customers to choose. For example, the 100 G PSM4 is and MSA that was specifically designed for more than 500 m transmission network applications. The purpose of its formulation is to provide a low-cost solution for transmitting 4 × 25 Gbps wavelengths through SSMF outside the IEEE 100 G Ethernet specification. This 100 G PSM4 uses eight SSMFs to form four independent channels, and the speed of each channel is 25 Gb/s.
As shown in Fig. 15[
Figure 15.(Color online) (a) Generic transceiver architecture of the
An external light source is also used in Sicoya’s design of 4 × 25 Gbit/s EPIC transceiver chip[
Figure 16.Cross section of co-integrated optical and electronic structures on the chip[
A photograph of this EPIC transceiver is shown in Fig. 17(a). The RX block consists of GCs, high-efficiency Ge PDs (shown in Fig. 8(c)), TIA and limiting amplifiers. RX performance strongly benefits from the co-integration of PD and TIA, because the proximity of PD and TIA input allows a strong reduction of parasitic capacitances. Besides, elimination of transmission lines and contact pads results in much lower inductance and capacitance. At 40 Gbit/s using 215–1 not return to zero (NRZ) PRBS, an error rate of 2.5 × 10–12 was obtained. At the TX, the modulation of the external laser output is achieved by a compact NMD modulator whose p–i–n diode is placed laterally to waveguide resonator[
Figure 17.(Color online) (a) Photograph of Sicoya’s EPIC transceiver[
Commercially, Intel Corp. researchers use 4 × 25 Gb/s PSM transmission technology[
3.2. Wavelength division multiplexing
WDM is another successful short-range optical interconnect solution. Compared with PSM, WDM has the advantage of requiring only two fibers instead of N, but its disadvantage is that it requires N lasers instead of one. Compared to fiber and installation costs, WDM is more meaningful because the total cost of the transceiver is decreased.
Another MSA is 100 G CWDM4, which is a 100 G transmission solution that is based on coarse wavelength division multiplexing (CWDM). Optical signal transmission is performed by using four center wavelengths of 1270, 1290, 1310, and 1330 nm, and each wavelength transmits 25 Gb/s data. The 100 G CWDM4 module can (de)multiplex the above four center wavelength into a SSMF for transmission through CWDM technology. Intel Corp. presented a high-speed, low consumption and uncooled 4 × 25 Gb/s silicon transceiver with a CWDM wavelength interval of 20 nm in the 1310 nm band. The transmission distance is up to 10 km and it can be used in DC and 5 G front-haul[
Intel Corp. reported the first 8-channel 400 G CWDM silicon optical transmitter[
Figure 18.(Color online) 8 channels of the Si MUX passband overlaid with the normalized output spectra of the CWDM8 transmitter[
Fig. 19 shows a 16-channel WDM receiver integrated on Si[
Figure 19.(Color online) (a) Top view of demultiplexer, 16-ch AWG and Ge PD array. (b) Cross section of Ge PD[
An optical frequency comb mode-locked laser (MLL) with a wide gain spectrum can reduce the dependence of the transmitter on multiple different wavelength lasers. Therefore, the transceiver can avoid integrating multiple light sources[
Figure 20.(Color online) (a) Photograph of transceiver board with optical I/O and only two fibers are used in the fiber array during system test. (b) Tx transmission and filtered MLL spectra at 25 °C and 257 mA showing 8 RRMs aligned within the passband of the filter[
Increasing the number of channels for optical communication will inevitably increase the packaging area. The advanced modulation format can increase the total bandwidth by increasing the amount of data carried per baud. Four-level pulse-amplitude modulation (PAM-4)[
3.3. Four-level pulse-amplitude modulation
The 100 Gb/s link pluggable modules in DCs (such as the PSM4 and CWDM4 mentioned above) have adopted the NRZ modulation format, which transmits single bit per baud. In comparison, each amplitude in PAM-4 transmits two bits per baud. As the interconnection rate increases from 100 to 400 Gb/s in DCs, PAM-4 direct detection format becomes the standard for DR4 and FR4 modules[
A novel compact silicon photonics transmitter that uses binary driven GeSi electro-absorption modulators (EAMs) in an interferometer topology has been demonstrated[
Figure 21.(Color online) (a) Two-bit optical DAC consisting of two EAMs. (b) Vector and eye diagram of the proposed topology optical PAM-4 generator[
The pluggable QSFP28 module is based on a highly integrated silicon photonic chip and a PAM-4 ASIC[
Figure 22.(Color online) Pluggable QSFP28 module which combine 4 × 25 Gb/s channels into two 50 Gb/s PAM-4 streams[
3.4. Coherent optical technology
In contrast from short-distance transmission, which commonly adopts intensity modulation and direct detection (IMDD), coherent optical communication is required when it is applied to long-distance communication, such as interconnection between DCs, metro area network and backbone network. Because of the high cost of long-distance optical fiber, enterprises attempt to carry as much information on each optical fiber as possible. Coherent optical communication technology can load information to different characteristics of the light, such as polarization (PDM[
Acacia demonstrated a silicon-based PIC which integrated a complete vector modulator and coherent transceiver on a 2.7 × 11.5 mm2 single chip[
Figure 23.(Color online) Block diagram of silicon photonic coherent PIC demonstrated by Acacia[
Researchers in Alibaba experimentally evaluated the performance of 400 G coherent and IMDD transceivers for DC optical interconnection[
Figure 24.(Color online) (a) BER against required total laser power for coherent and IMDD systems. (b) Estimated ASIC power consumption for PAM4, CAP16, DMT and coherent schemes based on 5 nm CMOS[
4. Conclusion
For present DCs, it is technically important to increase the speed of transceivers, as well as to reduce their cost and power consumption. The optical interconnects technique is necessary for the further development of the information age, it also provides enormous bandwidth and low power consumption. Silicon photonics transceivers would take advantage of the high integration, high reliability, and low cost of the CMOS process platform to create high bandwidth, low delay, and low power consumption photonic components. The high-speed transceivers for DCs are significantly optimized in cost and performance. Optical interconnects based on VCSEL and MMF dominate short range (< 300 m) optical links thanks to their low cost, technical simplicity, and low power consumption. Edge emitting LD plays a significant role when distance beyond this range. The various LDs integration schemes have their own coupling methods. Meanwhile, due to its unique excellent characteristics, the QD-LD has shown great potential as light sources on Si, whether to adopt bonding method or monolithic integration. We believe that QD-LDs directly grown on Si would be the last piece of the puzzle of monolithic integrated silicon photonic chip. Three types of Si modulator have their own merits and drawbacks, and a suitable one can be used according to the application. Ge PD is more suitable for silicon photonics than Si, and the PIN configuration is currently the most commercially successful. Utilizing the spatial multiplexing capability of light, WDM technology further increases the transmission speed of the transceiver and a single fiber. At present, PSM and WDM technology implemented with NRZ modulation format are the mainstream in 100 G transceiver modules. Due to their ability to transmit multiple bits per baud per channel, PAM-4 modulation and coherent optical communication technology would play significant roles in 400 G and 1 TB transceiver modules in the future, as long as the performance and cost can be optimized. These transceiver modules also require their DSPs to develop better structures and algorithms to reduce the bit-error rate and the power consumption.
Acknowledgments
This work is supported by the National Key Research and Development Program of China under Grant No. 2016YFB 0402302, and the National Natural Science Foundation of China under Grant No. 91433206.
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