The high bandwidth, low latency, and low power consumption of the on-chip optical interconnection can effectively alleviate the communication bottleneck of the electrical interconnection mode in a multicore processor. On-chip optical router is an essential part of the on-chip optical network design. With the gradual increase in processor scale, the traditional 4-port and 5-port can no longer meet the existing network density requirements. Additionally, with the expansion of the optical interconnection network, the problems such as communication congestion and low utilization of microring resonators have appeared. Therefore, this study proposes an 8-port on-chip optical router LONE to realize arbitrary communication between 8-port without blocking. OMNET++ simulation results show that LONE improves the utilization of microring resonators compared to optical routers of the same scale. Furthermore, the number of microring resonators is reduced by more than 41.67%, and insertion loss is reduced by more than 27.05%. The cost also has certain advantages, and the area overhead is reduced by more than 10%. Simultaneously, the biggest feature of the LONE structure is its simple structure, easy expansion, and adaptability to the needs of high-density networks.