• Infrared and Laser Engineering
  • Vol. 50, Issue 11, 20210009 (2021)
Xu Liu1、2、3, Yunduo Li1、2、3, Lianhua Ye1、2、3, Zhangcheng Huang1、2, Songlei Huang1、2, and Jiaxiong Fang1、2
Author Affiliations
  • 1State Key Laboratories of Transducer Technology, Shanghai Institute of Technical Physics, Chinese Academy of Sciences, Shanghai 200083, China
  • 2Key Laboratory of Infrared Imaging Materials and Detectors, Shanghai Institute of Technical Physics, Chinese Academy of Sciences, Shanghai 200083, China
  • 3University of Chinese Academy of Sciences, Beijing 100049, China
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    DOI: 10.3788/IRLA20210009 Cite this Article
    Xu Liu, Yunduo Li, Lianhua Ye, Zhangcheng Huang, Songlei Huang, Jiaxiong Fang. Pixel-level high resolution and low error rate time-to-digital converter circuit of single photon detection InGaAs avalanche focal plane array[J]. Infrared and Laser Engineering, 2021, 50(11): 20210009 Copy Citation Text show less

    Abstract

    Single-photon detection has important application prospects in quantum information, biomedicine and laser radar 3D imaging. InGaAs Geiger avalanche focal plane has single-photon sensitivity. Distance detection is achieved by measuring time of photon flight. Time-to-digital conversion accuracy determines the ranging accuracy of the detection system and this direction is the focus of single photon detection in recent years. A high resolution and low error rate 64×64 array type pixel level time-to-digital converter (TDC) circuit adopting three-stage asynchronous periodic counter structure was designed for InGaAs Geiger-mode avalanche focal plane array applications. Sub-nanosecond time resolution was realized by a voltage-controlled delay chain as well as a fine TDC that was shared by the entire array. The pixel level middle and coarse TDC used a divider counter to reduce the clock frequency and a linear feedback shift register to achieve a large time range, respectively. The high-segment coarse TDC can achieve timing, data storage and output integration through the register chain. The data conversion error rate originating from the mismatch of counting clocks between different stages was significantly reduced by incorporating of a delayed sampling scheme. A timing resolution of 0.5 ns at a reference clock frequency of 250 MHz, an integral nonlinearity of -0.4 to 0.6 LSB, a differential nonlinearity of -0.4 to 0.4 LSB, an effective digit of 13 bits, and a power consumption of 380.5 mW at 20 kHz frame rate are attained based on a 0.18 µm digital-analog hybrid CMOS technology. The TDC remains monotonous within the conversion range.
    Xu Liu, Yunduo Li, Lianhua Ye, Zhangcheng Huang, Songlei Huang, Jiaxiong Fang. Pixel-level high resolution and low error rate time-to-digital converter circuit of single photon detection InGaAs avalanche focal plane array[J]. Infrared and Laser Engineering, 2021, 50(11): 20210009
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