Silicon carbide (SiC) power metal–oxide–semiconductor field-effect transistors (MOSFETs) have attracted more and more attention and gradually replaced traditional silicon-based power switching devices due to their excellent electrical and thermal properties^[1-6]. The vertical SiC power MOSFETs have been commercialized and widely used in many power electronics systems^[7-9]. Compared with the conventional SiC power MOSFET, the specific on-resistance (R_on,sp) of the SiC superjunction (SJ) power MOSFET is drastically lowered at the same breakdown voltage (BV)^[10-12]. However, the SJ structure needs to consider the problem of charge imbalance. Once charge imbalance exists due to random process variation, the BV will decrease by a relatively large margin^[13,14]. On the other hand, the silicon high-k (Hk) insulator MOSFETs have been extensively studied because it does not easily suffer from charge imbalance and the process flow is less complex than SJ MOSFETs ^[15-18]. However, in order to bring its advantages into full performing, the permittivity of Hk insulators in silicon Hk MOSFETs needs to be very large, typically greater than 200^[15]. At present, a lot of high-k insulator materials are considered for Hk MOSFETs, e.g., SrTiO₃, BaTiO₃, PZT and other materials^[19-21]. However, most of them are ferroelectric materials and may not be suitable for high-speed switching applications^[15].

Up to now, the Hk MOSFET based on SiC has been rarely studied. In order to solve the above problems, this article proposes a SiC high-k superjunction integrated Schottky barrier diode (Hk-SJ-SBD) MOSFET structure (high-k insulator combined p-pillar in the drift region), which not only solves the problem of charge imbalance in the SJ structure, but also solves the problem that Hk materials in the Hk structure require a large permittivity. Moreover, a Schottky barrier diode (SBD) is also employed in the proposed Hk-SJ-SBD MOSFET, which results in a greatly improvements on the reverse recovery performance of the proposed device.

Fig. 1 shows the device structures of the conventional SiC MOSFET, SiC Hk MOSFET, the SiC SJ MOSFET and the proposed SiC Hk-SJ-SBD MOSFET, respectively. All the SiC MOSFETs have the same 11μm drift region thickness. In the SiC MOSFETs, the p⁺ shielding layers under the trench oxide of all the devices are used to relieve the electric field of the bottom corner of the trench^[22]. The current spreading layer (CSL) is used to suppress the junction field-effect transistor (JFET) effect and reduce the specific on-resistance (R_on,sp) of the devices^[23]. In the Hk SiC MOSFET structure (Fig. 1(b)), a part of the drift region is filled with a high-k insulating layer, and the doping concentration of the drift region can be increased dramatically from 8 × 10¹⁵ to 3 × 10¹⁶ cm^−3[15,24]. At the same time, the doping concentration of the CSL region can also be increased from 2 × 10¹⁶ to 6 × 10¹⁶ cm⁻³. In the SiC SJ MOSFET structure (Fig. 1(c)), the ion implantation is performed to form the p-type pillar region after the trench being etched, and then SiO₂ is deposited. This structure is beneficial to realize low-cost SiC superjunction devices^[25]. And the optimized p-region concentration (N_p) and drift region concentration (N_d) can also achieve charge balance. In the proposed 4H-SiC Hk-SJ-SBD MOSFET (Fig. 1(d)), the SiO₂ dielectric filled in the trench is replaced by a high-k dielectric layer, and an Schottky contact with titanium metal (work function is 4.33 eV) is introduced in the side wall of the trench as a part of the source to form a reverse freewheeling Schottky barrier diode (SBD). And in the proposed structure, the CSL region doping concentration (N_CSL) and the drift region doping concentration (N_d) can be further increased to further reduce theR_on,sp. At the same time, theN_p andN_d can be optimized to achieve charge balance and better performance. In the reverse conduction state of the proposed SiC Hk-SJ-SBD MOSFET, the CSL is not completely depleted, so the integrated SBD is turned on. The electrons flow through the Schottky contact, CSL and N-drift region to the drain electrode, which enhances the reverse freewheeling capability of the proposed Hk-SJ-SBD 4H-SiC MOSFET.

Based on the device simulation parameters inFig. 1, TCAD numerical simulations are performed to authenticate the performances of the four SiC trench power MOSFET devices, respectively. The main physical models for device simulation include SRH, Fermidirac, AUGER, CVT, FLDMOB, CONMOB, BGN, INCOMPLETE and IMPACT ANISO. And the channel mobilities of all four devices in the simulation are set to 40 cm²/(V·s) based on the experimental results in Ref. [26].Fig. 2(a) shows the breakdown voltages (BVs) of the conventional SiC MOSFET and the SiC Hk MOSFET with different permittivity of high-k insulators. As can be seen from the figure, the conventional MOSFET achieves a BV of 1950 V, and the BV of the Hk MOSFET increases with the increase of the permittivity, but when the permittivity is up to 200, the BV tends to be saturated with a value of 2220 V. This is because as the permittivity increases, more electric field lines generated by ionized donors in the n-region enter the high-k insulating layer laterally, and when the permittivity reaches 200, the electric field lines tend to be saturated. Therefore, the optimized minimum value of permittivity for the Hk MOSFET is 200.Fig. 2(b) shows the BVs of the proposed SiC Hk-SJ-SBD MOSFET with different permittivity (k) of high-k insulators under the optimizedN_d andN_p^[27]. It can be seen from the figure that when the high-k permittivity changes in a large range, the change in breakdown voltage is small, indicating that the high-k permittivity has little effect on the breakdown voltage of the proposed Hk-SJ-SBD MOSFET. In the proposed Hk-SJ-SBD MOSFET, the high-k insulator dramatically increases the effective permittivityε_eff (ε_eff ≈ε_I +ε_S) of the semiconductor region, whereε_I andε_S are the permittivity of the high-k insulator and semiconductor (SiC), respectively. Therefore, if the drift region is considered as a one-dimensional case, the Poisson’s equation of it can be given by the following formula (1)^[27].

1−∂2V∂y2=∂E∂y=qNeffϵeff≈qNeffεI+εS,

whereN_eff and ε_eff are the effective doping concentration and effective permittivity of the semiconductor region. When the structure is charge-imbalanced (N_eff ≠ 0), only a small amount ofε_eff is required to mitigate the effect of excess ionized impurities on BV. Therefore, the permittivity of the high-k insulator required for the proposed Hk-SJ-SBD MOSFET is much lower than that of Hk MOSFET. So, the permittivityk of the insulator with a value of 30 is selected for design the proposed SiC Hk-SJ-SBD MOSFET. And there are many non-ferroelectric insulators with a permittivity of around 30, such as La₂O₃^[28], LaAlO₃^[29] and Ta₂O₅^[30]. These materials have been used in SiC power devices and can easily be prepared in SiC power devices^[31-33]. And their critical breakdown electric fields are 4 MV/cm^[34], 11 MV/cm^[35], 4.5 MV/cm^[36] respectively, all are higher than 3MV/cm of SiC materials^[37], so they are all suitable for Hk insulators.Fig. 2(c) depicts the BVs of the SJ MOSFET and proposed Hk-SJ-SBD MOSFET (k = 30) at differentN_d,N_CSL andN_p. In order to achieve the BV of SJ MOSFET at about 2200 V, and to meet the charge balance condition and low specific on-resistance (R_on,sp) at the same time, the optimum value ofN_d andN_p for the SJ MOSFET are set to be 6 × 10¹⁶ and 2.1 × 10¹⁷ cm^–3, respectively. When there are some excess ionized acceptors in the p-type region,N_eff in Eq. (1) becomes a negative value at the macro level. Thus, with the same BV, theN_d can be increased^[27]. Therefore, the optimum value ofN_d andN_p for the proposed Hk-SJ-SBD MOSFET are 6.5 × 10¹⁶ and 2.6 × 10¹⁷ cm^–3, respectively, and the BV is 2240 V.

Fig. 3(a) shows the breakdown voltages of SiC SJ MOSFET and proposed Hk-SJ-SBD MOSFET at differentN_d andN_CSL, respectively. As can be seen from the figure, the breakdown voltages decrease with the increasing ofN_d (theN_CSL is set to the same as N_d), which is due to the increased lateral electric field caused by the charge imbalance^[38]. The breakdown voltage of SiC SJ MOSFET drops faster than the proposed SiC Hk-SJ-SBD MOSFET because the proposed MOSFET is less affected by charge imbalance than the SJ MOSFET. And from the figure, when the SJ MOSFET and the proposed MOSFET are charge balanced, the BV is 2220 and 2240 V, respectively.Fig. 3(b) shows the breakdown voltage versus the deviation ofN_d for the SiC SJ MOSFET and proposed SiC Hk-SJ-SBD MOSFET. As can be seen from the figure, the charge imbalance caused by the deviation ofN_d andN_CSL will cause the breakdown voltage to drop, and the breakdown voltage of SJ MOSFET drops faster than that of proposed Hk-SJ-SBD MOSFET, which indicates that the proposed MOSFET has better immunity against charge imbalance.

Fig. 4 shows the equipotential line distributions of the conventional MOSFET, the Hk MOSFET, the SJ MOSFET and the proposed Hk-SJ-SBD MOSFET (50V/line) at their own breakdown voltages, respectively, which indicates that the equipotential line distributions of the drift region of the proposed Hk-SJ-SBD MOSFET is more uniform compared with the conventional MOSFET device. And the equipotential line distributions of the SJ MOSFET and Hk MOSFET are similar to that of the proposed Hk-SJ-SBD MOSFET, which indicates the excellent blocking voltage performance of the proposed MOSFET.

Fig. 5 reveals the electric field distributions of the oxide at the gate trench corner of the conventional MOSFET, the Hk MOSFET, the SJ MOSFET and the proposed Hk-SJ-SBD MOSFET at their own breakdown voltages, respectively. It can be seen from the figures that the electric field of oxide at the trench corner of the conventional SiC MOSFET, SiC Hk MOSFET, SiC SJ MOSFET and the proposed SiC Hk-SJ-SBD MOSFET at their own breakdown voltages is 0.95, 1.6, 1.4, and 1.7 MV/cm, respectively. The electric field of the oxide at the gate trench corner of the four devices is much lower than that of the critical electric field of SiC material, so the breakdown voltage and reliability of the devices will not be affected.

Fig. 6 illustrates the electric field distributions along the dotted lineab of the four devices at their own breakdown voltages. As can be seen from the figure, except for the conventional MOSFET, the electric field distributions of the other three devices is relatively uniform. The conventional MOSFET has the largest peak electric field and the smallest BV. Compared with the conventional SiC SJ MOSFET, the proposed MOSFET has a slightly higher electric field because the doping concentrations in the p-pillar and n-drift regions of the proposed MOSFET is higher^[27]. Therefore, the proposed MOSFET has the highest breakdown voltage.

Fig. 7 demonstrates the three-dimensional electric field distributions of the conventional MOSFET, the Hk MOSFET, the SJ MOSFET and the proposed Hk-SJ-SBD MOSFET at their own breakdown voltages, respectively. It can be seen from the figure that the electric field distribution in the drift region of the proposed Hk-SJ-SBD MOSFET is very uniform and the electric field is the largest, which again proves that the proposed Hk-SJ-SBD MOSFET has a larger BV.

Fig. 8 plots the breakdown voltages at different interface charge densities in SJ MOSFET, Hk MOSFET and proposed Hk-SJ-SBD MOSFET. For the proposed Hk-SJ-SBD MOSFET and the SJ MOSFET, both positive and negative interface charges will lead to charge imbalance, resulting in a drop in breakdown voltage. The breakdown voltage of the SJ MOSFET drops faster because it is more sensitive to charge imbalance. For the Hk MOSFET, the effective doping densityN_eff is defined as^[39],

2Neff=ND+αNitw,

whereN_it is the interface charge density, α is an adjustment ratio ofN_it and thew is the width of the n-drift region. When the interfacial charge density changes from –1 × 10¹² to 1 × 10¹² cm^–2, the breakdown voltage decreases because the effective doping density increases. And the deposited SiO₂ followed by N₂O annealing is effective to decrease the interface state density^[40].

Fig. 9 depicts the on-state I–V curves of the four devices atV_GS = 20 V. It is clear from the figure that the on-state drain currentI_DS of the proposed Hk-SJ-SBD MOSFET is the largest at the sameV_GS andV_DS. This is because the proposed Hk-SJ-SBD MOSFET has the largestN_CSL andN_d. And the conventional MOSFET has the lowest current, since the lowest doping concentration of theN_CSL andN_d.

Fig. 10 shows the current density distributions atV_GS = 20 V andV_DS = 2 V of all the devices, respectively. It can be seen from the figure that the proposed Hk-SJ-SBD MOSFET has the highest current density because the proposed Hk-SJ-SBD MOSFET has the largestN_d andN_CSL.

Fig. 11 shows theR_on,sp comparison results of the proposed Hk-SJ-SBD MOSFET and the other three SiC MOSFET devices. And theR_on,sp of the proposed Hk-SJ-SBD MOSFET is the smallest, which is 72.4%, 23% and 5.6% lower than those of the conventional MOSFET, Hk MOSFET and SJ MOSFET, respectively.

Fig. 12(a) plots the reverse conductionI–V characteristics of the four devices. The turn-on voltage drop (V_F) of the integrated SBD in the proposed MOSFET is about 0.7 V with a metal work function of 4.33 eV (titanium), while theV_F of the body intrinsic SiC p–n diode of all the other three devices is about 2.7 V^[41]. Therefore, theV_F of the proposed Hk-SJ-SBD MOSFET is much smaller than that of the other three devices.Fig. 12(b) reveals the reverse recovery characteristics and the simulation circuit schematic of the four devices. And the peak reverse recovery current (I_rrm) of the conventional MOSFET, Hk MOSFET, SJ MOSFET and proposed MOSFET are 9.5, 8.3, 8.2, 1.9 A, respectively. The reverse recovery time (t_rr) of the conventional MOSFET, Hk MOSFET, SJ MOSFET and proposed MOSFET are 75, 63, 71, 16 ns, respectively. The reverse recovery charge (Q_rr) of conventional MOSFET, Hk MOSFET, SJ MOSFET and proposed MOSFET are 411, 343, 355, 18 nC, respectively. In short, theI_rrm,t_rr andQ_rr of the proposed SiC MOSFET are greatly reduced by more than 76%, 74% and 94% in comparison with those of all the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET respectively, so the reverse recovery capability of proposed Hk-SJ-SBD MOSFET is greatly improved due to the integration of the SBD.

Fig. 13(a) shows the drain–gate capacitance (C_gd) of the four SiC MOSFETs. Since the gate structures of the four devices are identical, theC_gd of the four devices are close to each other. It can be seen from the figure that when the drain-source voltage (V_DS) is greater than 300 V, theC_gd of Hk MOSFET is the largest, because the permittivity of the high-k insulator in the drift region of Hk MOSFET is very high (up to 200).Fig. 13(b) shows the drain-source capacitance (C_ds) of the four SiC MOSFETs. As can be seen from the figure, when the drain-source voltage (V_DS) is greater than 150 V, theC_ds of Hk MOSFET is the largest, and theC_ds of SJ MOSFET is the smallest. This is because the Hk MOSFET has the largestε_eff (≈ε_I +ε_S), resulting in the largestC_ds. TheC_ds of the conventional MOSFET is between the proposed Hk-SJ-SBD MOSFET and SJ MOSFET because the permittivity of SiC is 9.7, which is larger than that of SiO₂, but less than 30^[42].

Fig. 14(a) shows the simulation circuit of four SiC MOSFETs switching transients.Fig. 14(b) exhibits the switching performances of the four SiC MOSFETs.Fig. 14(c) exhibits the switching loss (E_on +E_off) of the four SiC MOSFETs. It can be seen from the figure that Hk MOSFET has the largest switching loss because Hk MOSFET has the largestC_gd +C_ds. And the switching loss of the proposed device is also only slightly higher than those of the conventional SiC MOSFET and SiC SJ MOSFET.

Table 1 lists the comparison results among the proposed SiC Hk-SJ-SBD MOSFET, Hk MOSFET, SJ MOSFET and the conventional MOSFET. The figure of merit (FOM = BV²/R_on,sp) of the proposed Hk-SJ-SBD MOSFET is the largest, reaching 7489 MV/cm². In addition to the superiority of the FOM, the switching performance of the proposed device is very close to that of the conventional MOSFET and the SJ MOSFET, and is better than that of the Hk MOSFET. And the reverse recovery performance (I_rr,Q_rr andt_rr) of the proposed device is greatly improved compared with the other three devices. Besides, from the above analysis, the proposed MOSFET is much less affected by charge imbalance than the SJ MOSFET.

Fig. 15 shows the trade-off relationship between theR_on,sp and BV of the four SiC MOSFET devices and other reported SiC MOSFET devices. As can be seen from the figure, the proposed Hk-SJ-SBD MOSFET achieves a better compromise between theR_on,sp and BV compared to that of the conventional MOSFET, Hk MOSFET and SJ MOSFET as well as SiC MOSFETs in other previous literature. This excellent compromise relationship of the proposed Hk-SJ-SBD MOSFET is mainly attributed to the increase on the doping concentration of the drift region and the CSL layer.

Fig. 16 shows brief fabrication process flow of the proposed Hk-SJ-SBD 4H-SiC MOSFET, in which a possible method to manufacture the proposed device is presented. The fabrication process starts with a SiC epitaxial wafer (Fig. 16(a)). And the deep trench etching and ion implantation are performed to form the p-type region (Fig. 16(b)). Next, the gate trench and the top of the p-type region are etched (Fig. 16(c)). Then, the ion implantations are carried out to form the p-base, n⁺ and p⁺ regions, respectively (Fig. 16(d)). Next, the high-k insulating layer and the trench bottom source metal are deposited; and the gate oxide and polysilicon are deposited by atomic layer deposition (ALD) and chemical vapor deposition (CVD) to form the trench gate, respectively (Fig. 16(e)). Finally, the drain and source metal deposition and annealing are conducted to form Schottky and ohmic contacts (Fig. 16(f)) ^[43-45].

A novel SiC high-k superjunction power MOSFET with an integrated sidewall Schottky barrier diode to achieve a better trade-off relationship between the specific on-resistance and the breakdown voltage is proposed and investigated in this article. The proposed SiC MOSFET not only alleviates the problem of charge imbalance in the SJ structure, but also solves the problem that the Hk materials in the SiC Hk MOSFET structure require a large permittivity. Compared with the SiC SJ MOSFET, Hk MOSFET and the conventional MOSFET, the proposed SiC MOSFET not only has a better trade-off relationship between specific on-resistance and breakdown voltage, but also has much better reverse recovery capability. It is expected to be applied to the SiC power electronics. Also a brief manufacturing process flow is presented.