High-efficiency reflector-less dual-level silicon photonic grating coupler

Valerio Vitali; Thalía Domínguez Bucio; Cosimo Lacava; Riccardo Marchetti; Lorenzo Mastronardi; Teerapat Rutirawut; Glenn Churchill; Joaquín Faneca; James C. Gates; Frederic Gardes; Periklis Petropoulos

doi:10.1364/PRJ.488970

Journals >Photonics Research >Volume 11 >Issue 7 >Page 1275 > Article

Photonics Research
Vol. 11, Issue 7, 1275 (2023)

High-efficiency reflector-less dual-level silicon photonic grating coupler

Valerio Vitali^1、2、*, Thalía Domínguez Bucio¹, Cosimo Lacava², Riccardo Marchetti³, Lorenzo Mastronardi¹, Teerapat Rutirawut¹, Glenn Churchill¹, Joaquín Faneca^1、4, James C. Gates¹, Frederic Gardes¹, and Periklis Petropoulos¹

Author Affiliations

¹Optoelectronics Research Centre, University of Southampton, Southampton, SO17 1BJ, UK

²Electrical, Computer and Biomedical Engineering Department, University of Pavia, 27100 Pavia, Italy

³Advanced Fiber Resources Milan S.r.l., 20098 San Donato Milanese, Italy

⁴Currently at Instituto de Microelectrónica de Barcelona, IMB-CNM (CSIC), Campus UAB, 08193 Bellaterra, Spain

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DOI: 10.1364/PRJ.488970 Cite this Article Set citation alerts

Valerio Vitali, Thalía Domínguez Bucio, Cosimo Lacava, Riccardo Marchetti, Lorenzo Mastronardi, Teerapat Rutirawut, Glenn Churchill, Joaquín Faneca, James C. Gates, Frederic Gardes, Periklis Petropoulos. High-efficiency reflector-less dual-level silicon photonic grating coupler[J]. Photonics Research, 2023, 11(7): 1275 Copy Citation Text

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(a) 2D schematic view and simulation layout of the proposed dual-level Si GC; (b) cross-sectional schematic with the parameter names used to indicate the GC dimensions.

Fig. 1. (a) 2D schematic view and simulation layout of the proposed dual-level Si GC; (b) cross-sectional schematic with the parameter names used to indicate the GC dimensions.

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(a) 2D numerical simulations of the CE at 1550 nm as a function of the bottom linear apodization factor Rbot and the etching depth e considering a single-level GC with a waveguide thickness hbot=220 nm. Other parameters used in the simulations are B=2 μm, Fin,bot=0.9, θ=14.5°, and T=720 nm. (b) 3D numerical simulations of the CE as a function of wavelength for the best-performing single-level and dual-level GC considering hbot=220 nm.

Fig. 2. (a) 2D numerical simulations of the CE at 1550 nm as a function of the bottom linear apodization factor Rbot and the etching depth e considering a single-level GC with a waveguide thickness hbot=220 nm. Other parameters used in the simulations are B=2 μm, Fin,bot=0.9, θ=14.5°, and T=720 nm. (b) 3D numerical simulations of the CE as a function of wavelength for the best-performing single-level and dual-level GC considering hbot=220 nm.

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Fig. 3. 2D numerical simulations of (a) directionality and (b) CE at 1550 nm as a function of the top linear apodization factor Rtop and thickness of the top level htop for a dual-level GC with hbot=220 nm. Other parameters used in the simulations are e=110 nm, Rbot=0.0275 μm−1, B=2 μm, Fin,bot=0.9, Fin,top=0.1, θ=14.5°, and T=720 nm.

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Fig. 4. Fabrication process diagram for the dual-level GC: (a) starting from SOI wafer with a Si thickness of 340 nm; (b) bottom GC level etching; (c) top GC level etching; (d) waveguide etching; (e) SiO2 cladding deposition. (f) Top-view and (g) angled-view SEM images of a fabricated device.

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Fig. 5. Simulated (red curve) and experimentally measured (blue curve) CE as a function of wavelength for the fabricated dual-level GC with a bottom waveguide thickness hbot=220 nm and top-level thickness htop=120 nm.

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Fig. 6. (a) Peak CE (CEpeak, left y axis) and peak wavelength (λpeak, right y axis) as a function of the mask misalignment; variation of the dimensions of the first top tooth and first bottom trench in the cases of (b) aligned masks, (c) −30 nm mask misalignment, and (d) +30 nm mask misalignment.

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Si [nm]	Description	${CE}_{S}$ [dB]	${CE}_{E}$ [dB]	Ref.	Si [nm]	Description	${CE}_{S}$ [dB]	${CE}_{E}$ [dB]	Ref.
220	GA*	−2.15	–	[15]	220	GA*	−1.9	–	[16]
220	GA + DBR*	−0.36	–	[15]	220^b	Dual-level	−0.28	−0.8	This work
220	Poly-Si overlay	−1.08	–	[17]	250	Full-etch PhC	−1.8	−1.74	[18]
220	Poly-Si overlay*	–	−1.6	[19]	250	Lag effect etch*	−1.31	−1.9	[20]
220	Linear apodiz.	−2.6	−2.7	[21]	250	Linear apodiz.	−2.2	−2.7	[22]
220	Gold BR	−1.43	−1.61	[23]	250	Aluminum BR*	−0.33	−0.5	[24]
220	DBR*	−0.86	−1.58	[25]	250	Aluminum BR*	−0.33	−0.62	[26]
220	Linear apodiz.	−1.6	–	[27]	250	Aluminum BR	−0.43	−0.58	[28]
220	DBR*	−1.02	–	[29]	260	Linear apodiz.	−0.8	−0.9	[27]
220	Si overlay*	−1.8	−2.6	[30]	260	GA*	−1.0	–	[16]
220	Ge overlay	−1.19	–	[31]	300	Dual-etch	−0.25	–	[32]
220	Dual-etch	−1.24	−2.2	[33]	300	Dual-etch	−2.2	−2.7	[34]
220	Dual-etch	−1.05	–	[35]	340	GA*	−0.5	–	[16]
220	Dual-etch	−1.1	−1.3	[36]	340	Apodized GC	−0.76	−1.2	[37]
220	Aluminum BR	−0.67	−0.69	[38]	340	Apodized GC	–	−1	[39]
220	SWG+prism	−0.5	−1.0	[40]	340	Apodized GC*	–	−0.7	[39]

Table 1. Summary of the Best Numerically Simulated (CE_S) and Experimentally Measured (CE_E) Coupling Efficiencies Reported in the Literature for Different GCs in the C-Telecom Band^a

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No.	$Λ$ [nm]	$L_{o, bot}$ [nm]	$L_{o, top}$ [nm]	No.	$Λ$ [nm]	$L_{o, bot}$ [nm]	$L_{o, top}$ [nm]
1	610	549	61	13	643	434	161
2	613	540	69	14	646	424	170
3	616	532	77	15	649	413	179
4	618	522	85	16	652	402	188
5	621	513	93	17	656	392	198
6	623	503	101	18	659	381	208
7	626	494	109	19	662	369	217
8	629	484	117	20	665	358	227
9	632	475	126	21	669	347	237
10	635	465	134	22	672	335	247
11	637	454	143	23	675	323	257
12	640	444	152	24	679	311	268

Table 2. Optimal Dimensions (Common Period Λ, Bottom Tooth Width L_o,bot, and Top Tooth Width L_o,top) Obtained from the Optimization of the Apodized Dual-Level Si GC with Waveguide Thickness h_bot = 220 nm and Top Level Thickness h_top = 120 nm^a