Fig. 1. (a) 3D view of the proposed ultralow-loss and compact silicon photonic waveguide spiral. (b) Enlarged view of tapered Euler-curve S-bend in the middle.

Fig. 2. Calculated losses due to the (a) top/bottom surface scattering (here σsidewall=0  nm) and (b) sidewall scattering (here σsurface=0  nm). (c) Total scattering loss (here σsurface=0.4  nm).

Fig. 3. Calculated coupling length Lc as the gap width Wgap in the Archimedean spiral varies.

Fig. 4. (a) Calculated excess loss and (b) intermode cross talk as a function of the core width Ws and the bending radius Rmax. Simulated light propagation of the TE0 mode in the (c) tapered Euler-curve S-bend and (d) regular arc S-bend. Calculated excess loss and intermode cross talk at the output port of the (e) tapered Euler S-bend and (f) regular arc S-bend.

Fig. 5. (a) Microscope image of the fabricated 50-cm-long waveguide spiral. (b) Measured transmissions of the waveguide spirals with different lengths L=5, 10, 20, 50, and 100 cm. (c) Measured transmissions of the waveguide spirals on seven chips (rhombus) and linear fit (blue curve). (d) Fitting of theoretical scattering losses (red curve) and measured results (dots).

Fig. 6. (a) Schematic configuration of the n-stage tunable optical delay line. (b) Microscope images of the fabricated tunable delay line chip. (c) Measured optical output waveforms of the tunable delay line system with a time delay of 10–5120 ps. Here the blue curves are the reference signals passing through the corresponding straight waveguide.

Table 1. Performance Comparison of On-Chip Tunable Delay Lines Based on Silicon-on-Insulator Waveguides^a