In non-volatile compute-in-memory (CIM) chips, the gate equivalent capacitance of large-scale array and the equivalent capacitance of long-distance transmission line severely restricted the switching speed of word line drive circuit (WLDC). The different voltage of multi-voltage range required by the nonvolatile CIM device was much larger than the withstand voltage of single transistor in the WLDC. Therefore, this paper proposed a high speed WLDC for CIM. By combining with the working principle of array, a multi-stage pre-processing voltage control method was adopted to transmit a variety of high voltages in multiple voltage domains in a selective hierarchical manner, which could greatly reduce the propagation delay. In addition, a clamp voltage divider structure was adopted to reduce the voltage drop of single device in the WLDC, which could solve the voltage withstand and high voltage switching problems of the WLDC. Simulation results showed that the circuit could convert the 1.2 V input of 100 MHz frequency into the high voltage output. The range of a single high speed WLDC output voltage could reach -10 V to 10 V, and the intrinsic delay was 1.4 ns. When the load was 5 pF, the transmission delay was 8.9 ns.