• Photonics Research
  • Vol. 6, Issue 5, 380 (2018)
Zepeng Pan, Songnian Fu, Luluzi Lu, Dongyu Li, Weijie Chang, Deming Liu, and Minming Zhang*
Author Affiliations
  • School of Optical and Electrical Information, Huazhong University of Science and Technology, Wuhan 430074, China
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    DOI: 10.1364/PRJ.6.000380 Cite this Article Set citation alerts
    Zepeng Pan, Songnian Fu, Luluzi Lu, Dongyu Li, Weijie Chang, Deming Liu, Minming Zhang. On-chip cyclic-AWG-based 12  ×  12 silicon wavelength routing switches with minimized port-to-port insertion loss fluctuation[J]. Photonics Research, 2018, 6(5): 380 Copy Citation Text show less
    Diagram of wavelength routing of a 6×6 WR switch (N=2 and M=3). Six kinds of small blocks with different colors represent different wavelengths.
    Fig. 1. Diagram of wavelength routing of a 6×6  WR switch (N=2 and M=3). Six kinds of small blocks with different colors represent different wavelengths.
    Simulated ILs of (a) 2×2 crossings and (b) 3×3 crossings as a function of semi-major axis a and semi-minor axis b of the elliptical region.
    Fig. 2. Simulated ILs of (a) 2×2 crossings and (b) 3×3 crossings as a function of semi-major axis a and semi-minor axis b of the elliptical region.
    (a)–(c) Diagrams of three connecting cases when the fan-out angle (θ) is 0°, 45°, and 90°, respectively, and related parameters are marked. (d) Horizontal length (Lx), longitudinal length (Ly), and square area (S) of the connecting area as a function of θ.
    Fig. 3. (a)–(c) Diagrams of three connecting cases when the fan-out angle (θ) is 0°, 45°, and 90°, respectively, and related parameters are marked. (d) Horizontal length (Lx), longitudinal length (Ly), and square area (S) of the connecting area as a function of θ.
    (a) Optimized interconnection network of the 12×12 WR switch. (b) Simulated port-to-port IL profiles of the conventional and the optimized interconnection networks.
    Fig. 4. (a) Optimized interconnection network of the 12×12  WR switch. (b) Simulated port-to-port IL profiles of the conventional and the optimized interconnection networks.
    Microscope image of the fabricated 12×12 silicon WR switch and zoomed-in crossing structure.
    Fig. 5. Microscope image of the fabricated 12×12 silicon WR switch and zoomed-in crossing structure.
    (a) Measured ILs of 3×3 AWG and 4×4 AWG. (b) Measured total IL of the 12×12 silicon WR switch for different transmission paths, reference interconnection network IL and AWG IL, which is given by subtracting the average reference interconnection network IL from the average total IL.
    Fig. 6. (a) Measured ILs of 3×3 AWG and 4×4 AWG. (b) Measured total IL of the 12×12 silicon WR switch for different transmission paths, reference interconnection network IL and AWG IL, which is given by subtracting the average reference interconnection network IL from the average total IL.
    Measured bit error rate (BER) curves at 10 Gb/s and eye diagram when received optical power is −20 dBm.
    Fig. 7. Measured bit error rate (BER) curves at 10 Gb/s and eye diagram when received optical power is 20  dBm.
    Zepeng Pan, Songnian Fu, Luluzi Lu, Dongyu Li, Weijie Chang, Deming Liu, Minming Zhang. On-chip cyclic-AWG-based 12  ×  12 silicon wavelength routing switches with minimized port-to-port insertion loss fluctuation[J]. Photonics Research, 2018, 6(5): 380
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