A Capacitor-less LDO with Transient Enhancement

ZHOU Yucheng; LIAO Deyang; MA Lei; SANG Lei; HUANG Wen

doi:10.13911/j.cnki.1004-3365.220499

[1] ADORNI N, STANZIONE S, BONI A. A 10-mA LDO with 16-nA IQ and operating from 800-mV supply ［J］. IEEE Journal of Solid-State Circuits, 2020, 55(2): 404-413.

[2] ZHAO X, ZHANG Q, XIN Y, et al. A high-efficiency fast-transient LDO with low-impedance transient-current enhanced buffer ［J］. IEEE Transactions on Power Electronics, 2022, 37(8): 8976-8987.

[3] LIU P, HUANG S, DUAN Q, et al. A low-quiescent current off-chip capacitor-less LDO regulator with UGCC compensation ［C］ // 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). 2019.

[4] MANDAL D, DESAI C, BAKKALOGLU B, et al. Adaptively biased output cap-less NMOS LDO with 19 ns settling-time ［J］. IEEE Transactions on Circuits & Systems II: Express Briefs, 2019, 66(2): 167-171.

[5] TU Y, TAN M. A three-stage amplifier with cascode Miller compensation and buffered asymmetric dual path for driving large capacitive loads ［J］. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(11): 4198-4202.

[7] CAI G G, LU Y, ZHAN C, et al. A fully integrated FVF LDO with enhanced full-spectrum power supply rejection ［J］. IEEE Transactions on Power Electronics, 2021, 36(4): 4326-4337.

[8] SHIRMOHAMMADLI V, SABERKARI A, MARTINEZ-GARCIA H, et al. Low power output-capacitorless class-AB CMOS LDO regulator ［C］ // 2017 IEEE International Symposium on Circuits and Systems (ISCAS). 2017: 1-4.

[9] MILLIKEN R J, SILVA-MARTINEZ J, SANCHEZ- SINENCIO E. Full on-chip CMOS low-dropout voltage regulator ［J］. IEEE Transactions on Circuits & Systems I: Regular Papers, 2007, 54(9): 1879-1890.

[10] PEREIRA-RIAL, LPEZ P, CARRILLO J M, et al. An 11 mA capacitor-less LDO with 308 nA quiescent current and SSF-based adaptive biasing ［J］. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(3): 844-848.

[11] HAN X, KI W H, WU L et al. Ultrahigh PSR output-capacitor-free adaptively biased 2-power- transistor LDO with 200-mV dropout ［J］. IEEE Solid-State Circuits Letters, 2022, 5: 106-109.

[12] KIM G S, PARK J K, KO G H, et al. Capacitor-less low-dropout (LDO) regulator with 9999% current efficiency using active feedforward and reverse nested Miller compensations ［J］. IEEE Access, 2019, 7: 98630-98638.