A large array ROIC was designed by SMIC 0.35 μm 3.3 V CMOS technology for large array InGaAs linear APD which worked on back-illuminated mode. Each pixel of the ROIC and APD was interconnected by indium bump, realizing the effective transmission and reception of current pulse. Simulation and test shows that the equivalent current sensitivity of the pixel preamplifier is 5 μA@2.5 ns pulse width by using cascade input stage and self-biased common source amplifier stage. Based on counting TDC and voltage-controlled delay TDC union structure and at 125 MHz master clock on chip, the accuracy of the pixel TDC which uses multiple clock phase interpolating is 1 ns. The power consumption of 32×32 ROIC is reduced by 65% by using time sharing power supply technology.