• Journal of Terahertz Science and Electronic Information Technology
  • Vol. 20, Issue 4, 385 (2022)
LI Longqian*, FANG Hua, FENG Jiao, and LI Peng
Author Affiliations
  • [in Chinese]
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    DOI: 10.11805/tkyda2020281 Cite this Article
    LI Longqian, FANG Hua, FENG Jiao, LI Peng. Design and implementation of PCIe interface logic based on FPGA[J]. Journal of Terahertz Science and Electronic Information Technology , 2022, 20(4): 385 Copy Citation Text show less

    Abstract

    The bus master Direct Memory Access(DMA) controller is implemented based on the Kintex-7 series Field Programmable Gate Array(FPGA) platform in order to improve the system performance of Peripheral Component Interconnect express(PCIe) bus interconnection devices in the process of high-speed communication and reduce the consumption of Central Processing Unit(CPU) resources. The high performance data transmission between Personal Computer(PC) and FPGA via PCIe is realized. DMA test cases are designed through the Root Port simulation platform, and the simulation results verify the correctness of the PCIe interface logic. The actual transmission rate is tested through the master computer and driver, and the experimental results show that the measured highest transfer rates are 1 620 MB/s on write and 1 427 MB/s on read, which reaches 84% of the theoretical maximum. The design scheme bears the advantages of low cost and high reliability, and can meet the requirements of data acquisition with high performance and low delay.
    LI Longqian, FANG Hua, FENG Jiao, LI Peng. Design and implementation of PCIe interface logic based on FPGA[J]. Journal of Terahertz Science and Electronic Information Technology , 2022, 20(4): 385
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