In order to solve the impact of capacitance mismatch on accuracy in high-precision SAR ADC, a second-order error-feedback mismatch error shaping (EFMES) SAR ADC with 16-bit accuracy, 500 kS/s sampling rate and 33 V working voltage was designed. Second order EFMES structure and dynamic element matching technology were adopted to reduce the influence of capacitor mispairing on ADC accuracy. The EFMES SAR ADC was designed in a SMIC 018 μm CMOS process. When the input signal amplitude was 2.6 V and the sampling rate was 500 kS/s, the power consumption of the ADC was 8382 mW, the SNDR was 93.67 dB, the ENOB was 15.27 bit, and the SNDR-based FoM was 168.4 dB.