Optical interconnects have recently emerged as a critical solution to meet the data transmission capacity demands driven by the rise of artificial intelligence (AI), high-performance computing (HPC), and other data-intensive applications in data centers (DCs) [1–3]. Compared to electrical interconnects, optical interconnects exhibit advantages in bandwidth, latency, power consumption, reach distance, and reconfigurability. In particular, based on photonic integrated circuits (PICs), optical interconnects can harness the capability of multiplexing technology to significantly increase the bandwidth density of data transmission, which holds great promise for playing a crucial role in chip-to-chip or board-to-board interconnects. Multiplexing technologies, such as wavelength-division multiplexing (WDM), have been predominantly used to significantly increase data transmission capacity for data centers and long-haul coherent communications [4,5]. However, as the wavelength channels scale up, the costs and system complexity also rise due to stability and crosstalk issues [6,7]. To enhance system computing power, the bandwidth density and capacity of chip-to-chip interconnects are required to be higher than those of traditional data communication. To meet the stringent demands of chip-to-chip interconnects, highly integrated multi-dimensional multiplexing methods need to be developed to avoid the challenges associated with increasing a single multiplexing dimension. Mode-division multiplexing (MDM) with planar waveguide modes [8–10] and polarization-division multiplexing (PDM) with dual polarizations [11,12] have been introduced to PICs [13–24]. As dimensions with intrinsic orthogonality, each spatial mode and polarization mode can carry information individually, which can be used with WDM simultaneously to extend the bandwidth density and transmission capacity.

The silicon photonics platform provides an excellent foundation for electronic integrated chips (EICs) and PICs. Consequently, various on-chip MDM or PDM-integrated devices and interconnect schemes based on silicon photonics have been proposed and studied. The earliest research on MDM devices was primarily based on the on-chip mode-evolution principle. For example, the multimode interference (MMI) scheme has been utilized to achieve broadband mode multiplexing combined with phase shift [25–28]. Similarly, Y-junction-based mode evolution devices have also been adopted [29–32]. PDM utilizing polarization splitter-rotators (PSRs) or polarization beam splitters (PBSs) were also based on the mode-evolution principle [14,33]. However, mode-evolution-based devices typically require relatively large sizes to achieve mode conversion, making it difficult to meet the demands for highly integrated interconnects. The phase-matching-based asymmetric directional coupler (ADC) structure is another common solution for mode-division multiplexing devices [34–41]. To extend bandwidth and reduce device length, multiple performance-enhanced ADC structures have been proposed, such as subwavelength grating (SWG) based ADC [42,43] and subwavelength sidewall corrugation-aided ADC [44]. However, due to the strict phase-matching conditions, ADC structures often lack fabrication robustness. Besides the prior-knowledge-guided devices, inverse design methods, including direct-binary-search (DBS) [45,46] and topology optimization (TO) [47], have been introduced to reduce the device footprint significantly [48]. Liu et al. demonstrated a four-channel mode multiplexer within a compact footprint of $6.8\mathrm{\mu m}\times 6\mathrm{\mu m}$, utilizing pixelated meta-structures inversely designed by DBS [19]. Frellsen et al. adopted the TO method to achieve a three-mode multiplexer with a footprint of $6.08\mathrm{\mu }\mathrm{m}\times 4.93\mathrm{\mu }\mathrm{m}$. Unfortunately, achieving a high bandwidth with ultra-compact inverse-designed mode multiplexers poses a challenge, thereby restricting the utilization of spectral efficiency when used in conjunction with WDM [19]. While Jiang et al. demonstrated a mode multiplexer supporting more than four modes with a maximum bandwidth of 100 nm utilizing the SWG-based ADC structure, the total device length exceeds 48 μm [42]. On the other hand, a pixelated device designed by DBS achieved the smallest footprint of $4.8\mathrm{\mu m}\times 6\mathrm{\mu m}$ [45], but the operational bandwidth of this device is less than 40 nm. All the schemes mentioned above compromise the performance in terms of operation bandwidth, device footprint, insertion loss, and modal crosstalk. Consequently, achieving a PIC with exceptional overall performance, encompassing broad bandwidth, compact footprint, and minimal crosstalk, remains a significant challenge, necessitating continued diligent efforts.

In this work, we proposed and experimentally demonstrated an on-chip multi-dimensional multiplexed photonic integrated circuit for high-capacity optical interconnects, leveraging MDM, PDM, and WDM. The device design utilized a novel manufacturing calibration method (MCM) assisted by topology optimization (TO) based inverse design. TO provides the greatest design flexibility among inverse design methods [49], crucial for realizing large-bandwidth and low-crosstalk multi-dimensional multiplexed PICs within extremely compact design regions. The MCM was incorporated into the optimization algorithm to ensure the manufacturability of the designed structure and mitigate performance degradation caused by post-fabrication structural distortions. The demonstrated multi-dimensional multiplexed PIC exhibits a broadband of 100 nm and an ultra-compact footprint of $6\mathrm{\mu m}\times 6\mathrm{\mu m}$, supporting the multiplexing of two waveguide modes and two polarization modes simultaneously. Moreover, low mode crosstalk $<-16\mathrm{dB}$ over the entire operation wavelength ranging from 1500 nm to 1600 nm was experimentally confirmed. As a proof of concept, we demonstrated $2\text{-modes}\times 2\text{-polarizations}\times 100\text{Gbit/s}$ PAM-4 direct modulation data transmission over 51 wavelengths with 0.8 nm wavelength channel spacing through our multi-dimensional multiplexed PIC. Each channel exhibits clear eye diagrams with a bit error rate (BER) lower than 7% hard-decision forward-error-correction (HD-FEC) of $3.8\times {10}^{-3}$. The ultra-compact and efficient multi-dimensional multiplexed PIC presented in this work demonstrates low loss and crosstalk across a wide bandwidth, showcasing significant potential for enhancing the bandwidth capacity and density of on-chip interconnects.

The schematic view of the proposed multi-dimensional multiplexed PIC is shown in Fig. 1(a). The PIC includes a multi-dimensional multiplexer and a demultiplexer, supporting two lateral waveguide modes with dual polarizations. The multiplexer features four single-mode waveguide input ports (${\mathrm{I}}_1$, ${\mathrm{I}}_2$, ${\mathrm{I}}_3$, ${\mathrm{I}}_4$) and a shared multimode bus waveguide (O), as illustrated in Fig. 1(b). For mode multiplexing, the ${\mathrm{TM}}_0$ mode and ${\mathrm{TE}}_0$ mode injected into the ${\mathrm{I}}_2$ and ${\mathrm{I}}_4$ ports are directly routed to the bus waveguide without conversion. The ${\mathrm{TM}}_0$ mode input into the ${\mathrm{I}}_1$ port is converted to the ${\mathrm{TM}}_1$ mode, while the ${\mathrm{TE}}_0$ mode input into the ${\mathrm{I}}_3$ port is converted to the ${\mathrm{TE}}_1$ mode. Thus, the multiplexer acts as a dual polarization mode converter as well. The width of the single-mode waveguide is 0.45 μm, ensuring single-mode propagation for both polarizations. The width of the bus waveguide is 1.6 μm, capable of supporting simultaneous propagation of four different modes (${\mathrm{TM}}_1$, ${\mathrm{TM}}_0$, ${\mathrm{TE}}_1$, ${\mathrm{TE}}_0$). The device is based on the silicon-on-insulator (SOI) platform with a top silicon layer of 220 nm and a buried oxide layer of 2 μm, as shown in Fig. 1(c). A 1 μm ${\mathrm{SiO}}_2$ layer is deposited as a cladding layer.

Our device aims to achieve low insertion loss, minimal crosstalk, and effective mode conversion across the entire 100 nm bandwidth within an ultra-compact size of $6\mathrm{\mu m}\times 6\mathrm{\mu m}$. To meet this ambitious design goal, we employed a gradient-based TO method to efficiently explore the parameter space by optimizing the permittivity distribution within the design region. The target of the TO method is to minimize the figure of merit (FOM) corresponding to the design variables $\rho$. In general, an inverse design problem can be described as follows: $$\underset{\rho }{\min }\mathrm{FOM}(\rho ),$$(1)$$\text{s.t.}\nabla \times \frac{1}{{\mu }_0}\nabla \times E-{\omega }^2{\mu }_0{\epsilon }_0{\epsilon }_r(\rho )E=-i\omega J,$$(2)$${\epsilon }_r(\rho )={\epsilon }_{\min }+\rho ({\epsilon }_{\max }-{\epsilon }_{\min }),\rho \in [0,1],$$(3)where ${\mu }_0$ is the magnetic permeability, ${\epsilon }_0$ is the permittivity, $J$ is the current source, $E$ is the electric field, $\omega$ is the angular frequency, and $\rho$ represents the normalized material density distribution, bounded between 0 and 1 [50]. ${\epsilon }_{\min }$ and ${\epsilon }_{\max }$ are the permittivity of the ${\mathrm{SiO}}_2$ and Si, respectively. ${\epsilon }_r(\rho )$ represents the permittivity used in the simulations. The design region of $6\mathrm{\mu m}\times 6\mathrm{\mu m}$ is segmented into basic units with a resolution of 20 nm. The determination of the device footprint takes into account both the device’s performance and the practical capabilities of the manufacturing. The relative permittivity of each unit is converted to design variables via linear mapping. The FOMs are defined as the combination of transmittance of different propagation paths for four supported modes. As illustrated in Eq. (4), the transmittance is defined as the modal overlap: $$T={\frac{|\int E\times H_{\mathit{m}}·\mathrm{d}S+\int E_{\mathit{m}}\times H·\mathrm{d}S|}{\int \mathrm{Re}(E_{\mathit{m}}\times H_{\mathit{m}})·\mathrm{d}S}}^2,$$(4)where ${\mathit{E}}_{\mathit{m}}$ and ${\mathit{H}}_{\mathit{m}}$ correspond to the field profiles of the target modes at the surface S (which is the electric-magnetic field distribution at the cross-section of bus waveguide O in our case), while $\mathit{E}$ and $\mathit{H}$ are the actual fields calculated by a forward three-dimensional finite-difference time-domain simulation (3D FDTD) [51]. The target modes in bus waveguide O are ${\mathrm{TM}}_1$, ${\mathrm{TM}}_0$, ${\mathrm{TE}}_1$, and ${\mathrm{TE}}_0$ which are injected and/or converted from input ports ${\mathrm{I}}_1\text{-}{\mathrm{I}}_4$, respectively. To achieve a broadband multiplexer for all the four modes, a co-FOM is defined as the sum of FOMs for four mode propagation paths in Eq. (5): $$\mathrm{FOM}=\sum _{\mathrm{mode}=1}^4\frac{{\int }_{\lambda ={\lambda }_{\min }}^{{\lambda }_{\max }}{T}_{\text{target}}(\lambda )-{\int }_{\lambda ={\lambda }_{\min }}^{{\lambda }_{\max }}|T(\lambda )-T_{\text{target}}(\lambda )|}{{\lambda }_{\max }-{\lambda }_{\min }},$$(5)where $T_{\text{target}}$ represents the target transmittance and $T$ represents the actual transmittance calculated by Eq. (4) for different propagation paths. The maximal and minimal wavelengths, ${\lambda }_{\max }$ and ${\lambda }_{\min }$, are 1600 and 1500 nm, respectively. The actual transmittance $T$ is calculated over the 100 nm wavelength band at 11 uniformly distributed wavelength points to ensure the broadband performance of the device. Equation (5) illustrates how the FOM for each mode path used for optimization is generated, as well as the final overall FOM of the device, which can be easily extended to more modal paths.

To minimize the defined FOM, an MCM-assisted TO inverse design process was proposed, as shown in Fig. 2(a), involving three main steps: adjoint optimization, binarization, and MCM. In the first step, a forward simulation was conducted to calculate the FOM, and the gradients in each basic design unit were efficiently calculated by performing an adjoint simulation. The adjoint method is capable of calculating the gradients in each iteration with only two FDTD simulations, regardless of the number of design variables [49,51]. Then, the design variable ($\rho$) at each design unit was updated based on the gradient’s descending direction obtained from the adjoint simulation, aiming to improve the FOM. Iterations were repeated until the gradient reached below a threshold ${\mathit{g}}_{\mathit{t}}$. It should be noted that, during the first adjoint optimization step, the design variables ($\rho$) underwent continuous updates within the range of 0 to 1. The second step involved binarization to progressively convert the design into a form that realizes a distinct permittivity distribution physically. A projection was used, as shown in Eq. (6): $${\epsilon }_{\mathit{i}}={\epsilon }_{\mathrm{low}}+\frac{\tanh (\beta \eta )+\tanh (\beta ({\rho }_i-\eta ))}{\tanh (\beta \eta )+\tanh (\beta (1-\eta ))}\mathrm{\Delta }\epsilon ,$$(6)where $\eta$ is the offset value and $\beta$ is the projection hyperparameter, which can be adjusted to increase the binarization of the design [52]. The value of $\beta$ increased with each iteration until achieving a design devoid of intermediate states, followed by adding a fabrication constraint to eliminate small features of the design. In our work, the fabrication constraint was set to be 80 nm, mainly because of the difficulty in fabricating feature sizes smaller than this dimension. Figure 2(b) shows the design structures at different steps, and Fig. 2(c) illustrates the iteration curve of our multiplexer optimization.

Basically, the designed structure is manufacturable after the removal of small features. However, for an arbitrary-shaped structure generated by the TO-based inverse design, there exists a high local density of the etched trenches. Since both wide and narrow opening areas are etched simultaneously, the etched trenches generally suffer from the micro-loading effect, leading to insufficient etching depth of narrow opening areas [53]. To ensure complete etching in these areas, an “over etch” process needs to be introduced. However, over-etching tends to bring up an enlarged trench area, leading to distorted structures compared to the original design, thereby deteriorating device performance. Since the distortion in fabrication is fatal for the devices with complex inverse-designed structures, we performed an etching test to identify this effect, as shown in Fig. 2(e). Yellow annotations indicate the target diameters of the voids, while white annotations indicate the actual diameter of the voids after etching. It can be observed that in our fabrication process, the diameter of the fabricated voids deviated from the target values. When the target diameters were smaller than 100 nm, the fabricated result exhibited errors as large as 15 nm. When the void diameter is relatively large, such as exceeding 150 nm, the etched dimensions closely approach the target size but still exhibit an error of up to 7.5 nm. The device performance degradations were confirmed experimentally. The insertion losses at 1550 nm of the fabricated multiplexer designed without any further MCM (purple histograms) were compared with simulated results (orange histograms) as illustrated in Fig. 2(f). It can be observed that there was significant insertion loss increase in all paths, particularly for TE-mode paths, where IL degradations exceeded 5 dB.

To solve this problem, in the third step, the MCM was proposed to mitigate the performance degradation caused by structural distortion of the device during the fabrication process. The scheme of the MCM is illustrated in Fig. 2(d). First, we introduced a feature extraction step, which employed the morphology operators (“open” operation) to extract small features in our design. The “open” operation involves an erosion followed by a dilation operation. Small features can be extracted by subtracting the design after the open operation from the original design ($D_o$). During the erosion operation, a structuring kernel K (a small predefined shape) was moved across $D_o$, determining the minimum pixel value within the overlapping region between the kernel and the design, while the dilation operation determined the maximal pixel value [54]. Second, an erosion operation was implemented at the extracted small features to compensate for the distortion during the etching process. For feature sizes in the range of 100 nm to 200 nm, we applied a 7.5 nm structural shrink. Meanwhile, for feature sizes between 80 nm and 100 nm, a 15 nm shrinking process was applied. Figure 2(f) illustrates the insertion losses of fabricated multiplexers with and without the MCM. It is evident that the introduction of the MCM significantly reduced the performance degradation of the fabricated multiplexer caused by the widening of etched apertures.

Figures 3(a)–3(d) show the simulated transmission spectra of the inverse-designed multi-dimensional multiplexed PIC with and without the MCM across 1500–1600 nm bandwidth for ${\mathrm{TM}}_1$, ${\mathrm{TM}}_0$, ${\mathrm{TE}}_1$, and ${\mathrm{TE}}_0$ modes, respectively. For the multiplexer with the MCM, the ILs are less than 0.7 dB for ${\mathrm{TM}}_1$ mode, 1.2 dB for ${\mathrm{TM}}_0$ mode, 1.1 dB for ${\mathrm{TE}}_1$ mode, and 1.2 dB for ${\mathrm{TE}}_0$ over the entire 100 nm spectral band. The CTs are lower than $-20\mathrm{dB}$ for TM modes and lower than $-17\mathrm{dB}$ for TE modes over the 100 nm band. To demonstrate the improvements of the MCM on device performance, particularly in insertion loss, we processed the device structure based on the results of etching experiments to simulate the performance of the fabricated device without adopting the MCM. For feature sizes in the range of 100 nm to 200 nm, we applied a 7.5 nm structural expansion. Meanwhile, for feature sizes between 80 nm and 100 nm, a 15 nm expansion process was applied. Then, we re-simulated the processed structure to obtain the insertion losses and crosstalks of each modal path as shown by the dashed lines in Figs. 3(a)–3(d). It can be observed that after calibrating the structural distortions using the MCM, the insertion losses for all modal paths decreased. Particularly, the TE-polarized ${\mathrm{I}}_3\text{-}\mathrm{O}$ and ${\mathrm{I}}_4\text{-}\mathrm{O}$ paths exhibited a significant 2 dB reduction in insertion loss at 1550 nm, along with a notable increase in operating bandwidth. At 1600 nm, the insertion loss decreased by 6 dB, enabling our device to operate with an ultra-broad bandwidth of 100 nm. The simulation results align with the performance of fabricated devices with and without the MCM depicted in Fig. 2(f). Figure 3(e) shows the simulated mode field distributions for four mode multiplexing paths at 1550 nm. As can be seen, the optimized arbitrary-shaped multiplexer is capable of transmitting four fundamental modes from different input waveguides (${\mathrm{I}}_1\text{-}{\mathrm{I}}_4$) to the bus waveguide (O) through varying routers. In ${\mathrm{I}}_1\text{-}\mathrm{O}$ and ${\mathrm{I}}_3\text{-}\mathrm{O}$, the ${\mathrm{TM}}_0$ and ${\mathrm{TE}}_0$ modes are converted to ${\mathrm{TM}}_1$ and ${\mathrm{TE}}_1$.

The inversely designed multiplexer was fabricated on a standard SOI platform with a 220 nm thick top silicon and 2 μm buried oxide layer. Initially, the devices and waveguides were patterned by electron beam lithography (EBL) using resist ZEP 520A as a mask. Then, the pattern was transferred onto the device layer via single-step inductively coupled plasma (ICP) etching. Finally, the device was deposited with a 1 μm thick ${\mathrm{SiO}}_2$ cladding layer using plasma-enhanced chemical vapor deposition (PECVD). Figures 4(a) and 4(b) show a microscope image and a scanning electron microscope (SEM) picture of the fabricated MDM circuit. The input ports (${\mathrm{I}}_1\text{-}{\mathrm{I}}_4$) and the corresponding four output ports (${\mathrm{O}}_1\text{-}{\mathrm{O}}_4$) were labeled. The multiplexer not only facilitates mode multiplexing but also converts higher-order modes into two polarized fundamental modes, thereby eliminating the necessity for additional mode conversion devices.

To characterize the fabricated multiplexer with dual polarizations, grating couplers for TE and TM modes were cascaded at the input/output ports. A tunable laser with a wavelength tuning range of 1500–1600 nm (EXFO T100-HP) was used as the light source. A polarization controller was utilized to launch TM polarized light to ${\mathrm{I}}_1$ and ${\mathrm{I}}_2$ ports and TE polarized light to ${\mathrm{I}}_3$ and ${\mathrm{I}}_4$ ports. The measured transmissions at output ports (${\mathrm{O}}_1\text{-}{\mathrm{O}}_4$) are shown in Figs. 4(c)–4(f) after the subtraction of the transmission spectra of the grating couplers. The insertion losses of PICs over the 100 nm band were measured to be 1.9 dB, 1.9 dB, 1.9 dB, and 1.3 dB at 1550 nm for ${\mathrm{TM}}_1$ (${\mathrm{I}}_1\text{-}{\mathrm{O}}_1$), ${\mathrm{TM}}_0$ (${\mathrm{I}}_2\text{-}{\mathrm{O}}_2$), ${\mathrm{TE}}_1$ (${\mathrm{I}}_3\text{-}{\mathrm{O}}_3$), and ${\mathrm{TE}}_0$ (${\mathrm{I}}_4\text{-}{\mathrm{O}}_4$) mode paths, respectively. The maximal crosstalks from other input ports to output ports ${\mathrm{O}}_1$, ${\mathrm{O}}_2$, ${\mathrm{O}}_3$, and ${\mathrm{O}}_4$ over the whole wavelength range were measured to be $-16.5\mathrm{dB}$ (at 1503.1 nm), $-17.9\mathrm{dB}$ (at 1510.3 nm), $-16.0\mathrm{dB}$ (at 1599.8 nm), and $-16.0\mathrm{dB}$ (at 1568.0 nm), respectively. The results indicate that the fabricated PIC exhibits excellent performances across a 100 nm bandwidth, covering the C-band and part of the L-band. It should be noted that, according to the simulation result, the operation bandwidth (defined as bandwidth with $\mathrm{IL}<2\mathrm{dB}$ and $\mathrm{CT}<15\mathrm{dB}$) of the final optimized device exceeds 100 nm. The measured transmission spectrum range of the device from 1500 nm to 1600 nm is limited by the bandwidth range of the tunable laser, not the device performance.

Table 1 summarizes the performance of our fabricated PIC. The chip achieves a low insertion loss of $<2.0\mathrm{dB}$ and low crosstalk of $<-16\mathrm{dB}$ over a broad wavelength band of 100 nm. We compare our device with other reported SOI-based devices supporting four modes, as listed in Table 2. SWG and Y-junction-based multiplexers exhibit low insertion loss but have long device lengths exceeding 40 μm. In contrast, inverse-designed multiplexers achieve a compact footprint, but the bandwidth of the DBS-based devices is limited to 40 nm. Our device occupies an ultra-compact footprint of $6\mathrm{\mu m}\times 6\mathrm{\mu m}$ and a broad bandwidth of 100 nm ranging from 1500 to 1600 nm, enabling the combination of MDM, PDM, and WDM. Compared with the DBS method, the TO method we adopted offers more design degrees of freedom and faster convergence speeds, enabling superior device performance including broader bandwidth. Additionally, our developed MCM mitigates performance degradation arising from manufacturing errors, allowing our device to maintain an advantage in device performance outcomes. Figure 5 summarizes several multiplexers based on different structures using a radar image. The bandwidth, multiplexing dimension, and device length of multiplexer as the three most significant characteristics have been compared. As can be seen in the figure, our device has superior overall performance among all its counterparts.Table 1.

Properties of the Inverse-Designed Multiplexer

We experimentally evaluated the data transfer capability of our proposed multi-dimensional multiplexed PIC for high-capacity optical interconnection. The experimental setup is illustrated in Fig. 6(a). On the transmitter side, a 100 Gbit/s electrical PAM-4 signal was generated by an arbitrary waveform generator (AWG) and an electrical driver. The signal was modulated onto an optical carrier using a 40 GHz Mach–Zehnder modulator (MZM). Between the external cavity laser and the modulator, a polarization controller (PC) was placed to ensure minimal polarization-dependent loss for the coupling of light into the PIC. However, a pair of grating couplers introduced an extra 10 dB insertion loss for both polarizations. On the receiver side, a variable optical attenuator (VOA) was used to adjust the optical signal’s received optical power (RoP). After detection by a 40 GHz photodetector integrated with a trans-impedance amplifier (TIA), the generated electrical signal was sampled and captured by a real-time sampling oscilloscope for offline BER calculation and eye diagram analysis.

To quantify the impact of our PIC on the link budget of the established interconnection system, the BERs of the four mode multiplexing channels as a function of the RoP were measured at a center wavelength of 1550 nm [Fig. 6(b)]. Compared to the back-to-back (B2B) configuration where signals with TM and TE polarization directly transmit across a straight waveguide on the same chip, the RoP penalties for the four channels are less than 0.4 dB at the BER of $3.8\times {10}^{-3}$ [the BER threshold of 7% forward error correction (FEC)]. This highlights the high channel power isolation and negligible transmission loss of our PIC.

Next, the electro-optic (EO) responses ($|{{\mathit{S}}_{21}\text{|}}^2$) of ${\mathrm{I}}_3\text{-}{\mathrm{O}}_3$ and ${\mathrm{I}}_3\text{-}{\mathrm{O}}_4$ channels at the central wavelengths of 1530, 1550, and 1570 nm were measured to analyze the radio-frequency (RF) crosstalk between adjacent modes [Fig. 6(c)]. These three wavelengths were chosen here due to their relatively high optical power crosstalk, particularly at 1570 nm, which exhibits the maximum power crosstalk of $-16\mathrm{dB}$. Fortunately, the measured ${\mathit{S}}_{21}$ curve shows that the average RF crosstalk between ${\mathrm{TE}}_0$ and ${\mathrm{TE}}_1$ modes for all wavelengths is less than $-33\mathrm{dB}$ below 25 GHz. The frequency point of 25 GHz represents the Nyquist bandwidth point for 50 GBaud. Such high RF isolation within the Nyquist bandwidth is believed to have little effect on the overall transmission capacity when ${\mathrm{TE}}_0$ and ${\mathrm{TE}}_1$ modes are multiplexed. This deduction is based on the crosstalk test results in Ref. [55], where $-33\mathrm{dB}$ crosstalk was shown to have a negligible impact on a 200 Gbit/s on-chip optical interconnection.

After demonstrating signal transmission at a center wavelength of 1550 nm, we further tested the interconnection performance of our PIC over a broader wavelength range from 1530 nm to 1570 nm with a spacing of 4 nm. The measured BERs of all four channels are presented in Fig. 7(a). The red circles represent the BERs measured when the signal is transmitted through TE and TM mode grating couplers and the reference straight waveguide. The black dots represent the BERs when the signal passes through different wavelength and mode channels of our multiplexer. No compensation is made for input optical power; thus, the measured BERs include the effects of insertion loss in each channel. We can observe that for the four mode channels, the BER of the reference optical link increases as the wavelength deviates from 1550 nm. This is primarily due to the decrease in received optical power caused by the insertion loss of the grating couplers. The TE and TM gratings used in our design exhibit insertion loss of 5 dB at the center wavelength of 1550 nm and 3 dB bandwidth of 43 nm and 40 nm. It limits our data transmission test to a larger wavelength range. By using higher-performance gratings or employing facet coupling to compensate for power losses, our high-speed transmission can cover a 100 nm bandwidth, taking advantage of the excellent optical performance of our multi-dimensional multiplexer PIC. The BERs of all channels are under $3\times {10}^{-3}$, enabling fault-tolerant communication using 7% FEC codes. The data rate of each channel is 100 Gbit/s. To further expand transmission capacity, a smaller wavelength spacing of 0.8 nm was used. We tested the BERs of 51 wavelength channels through the ${\mathrm{I}}_3\text{-}{\mathrm{O}}_3$ channel, which has the highest BER among the four MDM channels plotted in Fig. 7(b). Most of the measured BERs are under $1\times {10}^{-5}$, and all of them are under the FEC threshold, which matches with results in Fig. 6(a). So, 51 wavelength channels in four mode channels with two polarizations can be utilized for hybrid interconnects. With high-performance grating coupling or facet coupling, more than 100 wavelength channels over a 100 nm band can be utilized, and the total data rate can further be doubled. Figure 7(c) presents eye diagrams of 1530 nm, 1550 nm, and 1570 nm wavelength channels for two B2B and four MDM channels.

In conclusion, we inversely designed and experimentally demonstrated a multi-dimensional photonics integrated circuit incorporating WDM, MDM, and PDM, which exhibits an ultra-compact footprint of $6\mathrm{\mu m}\times 6\mathrm{\mu m}$ and a broad bandwidth of 100 nm simultaneously. A novel manufacturing calibration method (MCM) was proposed to assist the topology optimization-based inverse design to eliminate device performance degradation from the fabrication variations. The multi-dimensional photonics integrated circuit has a low insertion loss of $<2\mathrm{dB}$ and a low crosstalk of $<16\mathrm{dB}$ from 1500 to 1600 nm. As a proof of concept, we experimentally demonstrated $2\text{modes}\times 2\text{polarizations}\times 100\text{Gbit/s}$ PAM-4 single-wavelength direct modulation data transmission over 51 wavelengths on 0.8 nm channel spacing for all modes. The proposed PIC is a great candidate for future optical interconnect link-capacity scaling. Moreover, with the MCM-assisted inverse design method, much broader operation bandwidth and more orthogonal lateral modes can be combined to achieve integrated optical interconnects with even higher bandwidth density. The ultra-compact size of multi-dimensional photonic integrated circuits also promotes the possibility for large-scale and densely integrated optical signal processors and single-chip microprocessors.