[2] Hans-Joachim, L Gossmann, Tao Feng, et al. Reverse diode leakage in spike-annealed ultra-shallowjunctions. MRS Online Proceedings Library (OPL), 669, J4-J8(2001).

[3] Felch S, Bl J, Fang Z, et al. Optimized BF3P2 LAD implantation with SiPAI f shallow, abrupt high quality p+n junctions fmed using low temperature SPE annealing [C]Ion Implantation Technology, Proceedings of the 14th International Conference, 2002: 5255.

[4] J O Borland. Low temperature shallow junction formation for 70 nm technology node and beyond. MRS Online Proceedings Library (OPL), 717, 11(2002).

[5] Kei Kanemoto, Herzl Aharoni, Tadahiro Ohmi. Ultrashallow and low-leakage p+n junction formation by Plasma Immersion Ion Implantation (PIII) and low-temperature post-implantation annealing. Japanese Journal of Applied Physics, 40, 2706-2711(2001).

[6] Osburn C M, Downey D F, Felch S B, et al. Ultrashallow junction fmation using very low energy B BFsub 2 sources [C]Proceedings of 11th International Conference on Ion Implantation Technology, 1996: 607610.

[7] Shigeo Onishi, Kenichi Tanaka, Keizo Sakiyama. A new method f evaluating temperature distribution by using Si + + B + implantation [C]Proceedings of SPIE, 1990, 1189: 8388.

[8] Karim Huet, Fulvio Mazzamuto, Toshiyuki Tabata, et al. Doping of semiconductor devices by laser thermal annealing. Materials Science in Semiconductor Processing, 62, 92-102(2017).

[9] Murto R, Jones K, Rendon M, et al. Activation deactivation studies of laser thermal annealed bon, arsenic, phosphus, antimony ultrashallow abrupt junctions [C]International Conference on Ion Implantation Technology Proceedings. Ion Implantation Technology2000 (Cat. No. 00EX432), 2000: 155158.

[10] P Baeri, E Rimini. Laser annealing of silicon. Materials Chemistry and Physics, 46, 169-177(1996).

[11] Talwar S, Verma G, Weiner K H. Ultrashallow, abrupt, highlyactivated junctions by lowenergy ion implantation laser annealing[C]1998 International Conference on Ion Implantation Technology. Proceedings (Cat. No. 98EX144), 1998: 11711174.

[12] Yu Bin, Wang Yun, Wang Haihong, et al. 70 nm MOSFET with ultrashallow, abrupt, superdoped SD extension implemented by laser thermal process (LTP)[C]International Electron Devices Meeting 1999. Technical Digest (Cat. No. 99CH36318), 1999: 509512.

[13] Goto K, Yamamoto T, Kubo T, et al. Ultralow contact resistance f decanm MOSFETs by laser annealing [C]International Electron Devices Meeting 1999. Technical Digest (Cat. No. 99CH36318), 1999: 931933.

[14] C D Lindfors, K S Jones, M E Law, et al. Boron activation during solid phase epitaxial regrowth. MRS Online Proceedings Library (OPL), 610, B10-B12(2000).

[15] R Lindsay, B J Pawlak, P Stolk, et al. Optimisation of junctions formed by solid phase epitaxial regrowth for sub-70 nm CMOS. MRS Online Proceedings Library (OPL), 717, 21(2002).

[16] Fung S K H, Huang H T, Cheng S M, et al. 65 nm CMOS high speed, general purpose low power transist technology f high volume foundry application [C]Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004: 9293.

[17] Hervé Besaucèle, Audrey Ad, Franois Beau, et al. High energy excimer laser system f nanosecond annealing of semiconduct devices [C]Proceedings of SPIE, 2019, 11042: 110420S.

[18] Talwar S, Verma G, Weiner K H, et al. Laser thermal processing f shallow junction silicide fmation [C]Proceedings of SPIE, 1998, 3506: 7481.

[19] Felch S B, Downey D F, Arevalo A, et al. Submelt laser annealing followed by lowtemperature RTP f minimized diffusion [C]2000 International Conference on Ion Implantation Technology Proceedings. Ion Implantation Technology2000 (Cat. No. 00EX432), 2000: 167170.

[20] Talwar S, Markle D, Thompson M O. Junction scaling using lasers f thermal annealing [J]. Solid State Technology 2003, 46(7), 8384, 86, 88.

[21] Pouydebasque A, Dumont B, Denme S, et al. High density high speed SRAM bitcells ring oscillats due to laser annealing f 45 nm bulk CMOS [C]IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest, 2005: 663666.

[22] Yamamoto T, Kubo T, Sukegawa T, et al. Junction profile engineering with a novel multiple laser spike annealing scheme f 45nm node high perfmance low leakage CMOS technology [C]2007 IEEE International Electron Devices Meeting, 2007: 143146.

[23] D H Triyoso, G Spencer, R I Hegde, et al. Laser annealed Hf_xZr_1−xO₂ high-k dielectric: Impact on morphology, microstructure, and electrical properties. Applied Physics Letters, 92, 113501(2008).

[24] Linder B P, Dasgupta A, o T, et al. Process optimizations f NBTIPBTI f future replacement metal gate technologies [C]2016 IEEE International Reliability Physics Symposium (IRPS), 2016: 1B4B.

[25] Liu Y, Gluschenkov O, Li J, et al. Strained Si channel MOSFETs with embedded silicon carbon fmed by solid phase epitaxy [C]2007 IEEE Symposium on VLSI Technology, 2007: 4445.

[26] Narasimha S, Chang P, toll C, et al. 22 nm highperfmance SOI technology featuring dualembedded stresss, EpiPlate HighK deeptrench embedded DRAM selfaligned via 15LM BEOL [C]2012 International Electron Devices Meeting, 2012: 3.3.13.3.4.

[27] S Simões, R Calinas, M T Vieira, et al. In situ TEM study of grain growth in nanocrystalline copper thin films. Nanotechnology, 21, 145701(2010).

[28] F Carta, S M Gates, A B Limanov, et al. Sequential lateral solidification of silicon thin films on Cu BEOL-integrated wafers for monolithic 3-D integration. IEEE Transactions on Electron Devices, 62, 3887-3891(2015).

[29] Liu Z, Gluschenkov O, Niimi H, et al. Dual beam laser annealing f contact resistance reduction its impact on VLSI integrated circuit variability [C]2017 Symposium on VLSI Technology, 2017: T212T213.

[30] W H Liu, J W Luo, S S Li, et al. The seeds and homogeneous nucleation of photoinduced nonthermal melting in semiconductors due to self-amplified local dynamic instability. Science Advances, 8, eabn4430(2022).

[31] S K Sundaram, E Mazur. Inducing and probing non-thermal transitions in semiconductors using femtosecond laser pulses. Nature Materials, 1, 217-224(2002).

[32] C Lee, P Srisungsitthisunti, S Park, et al. Control of current saturation and threshold voltage shift in indium oxide nanowire transistors with femtosecond laser annealing. Acs Nano, 5, 1095-1101(2011).

[33] M J Smith, Y T Lin, M J Sher, et al. Pressure-induced phase transformations during femtosecond-laser doping of silicon. Journal of Applied Physics, 110, 053524(2011).

[34] C Chen, G Chen, H Yang, et al. Solution-processed metal oxide arrays using femtosecond laser ablation and annealing for thin-film transistors. Journal of Materials Chemistry C, 5, 9273-9280(2017).

[35] Frank M M, Cartier E A, Lavoie C, et al. Crystallization of hafniumoxidebased ferroelectrics f BEOL integration [C]2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). IEEE, 2022: 316318.

[36] L Bayer, X Ye, P Lorenz, et al. Studies on perovskite film ablation and scribing with ns-, ps-and fs-laser pulses. Applied Physics A, 123, 1-8(2017).

[37] Min Liu, Liu Zheng, Zhi He, . Continuous laser annealing for activating 10 MeV implanted phosphorus in silicon wafer. Laser & Infrared, 52, 1000-1003(2022).

[38] Yizhe Wang, Xuehao Yu, Molin Liu, . Study on light source of low jitter excimer laser amplifier. Infrared and Laser Engineering, 52, 20220468(2023).

[39] Scott J C, Gluschenkov O, Goplen B, et al. Reduction of RTAdriven intradie variation via modelbased layout optimization [C]2009 Symposium on VLSI Technology, 2009: 152153.

[40] Miyashita T, Kubo T, Kim Y S, et al. A study on millisecond annealing (MSA) induced layout dependence f flash lamp annealing (FLA) laser spike annealing (LSA) in multiple MSA scheme with 45 nm highperfmance technology [C]2009 IEEE International Electron Devices Meeting (IEDM), 2009: 14.

[41] Karim Huet, Toshiyuki Tabata, Joris Aubin, et al. Laser thermal annealing for low thermal budget applications: from contact formation to material modification (invited). ECS Transactions, 89, 137(2019).

[42] S F Lombardo, G Fisicaro, I Deretzis, et al. Theoretical study of the laser annealing process in FinFET structures. Applied Surface Science, 467-468, 666-672(2019).

[43] L Dagault, S Kerdilès, A P Acosta, et al. Investigation of recrystallization and stress relaxation in nanosecond laser annealed Si_1−xGe_x/Si epilayers. Applied Surface Science, 527, 146752(2020).

[44] Ni C N, Rao K V, Khaja F, et al. Ultralow NMOS contact resistivity using a novel plasmabased DSS implant laser anneal f post 7 nm nodes [C]2016 IEEE Symposium on VLSI Technology, 2016: 12.

[45] Tabata T, Aubin J, Huet K, et al. Super activation of highly surface segregated dopants in high Ge content SiGe obtained by melt UV laser annealing [C]22nd International Conference on Ion Implantation Technology (IIT), 2018: 353356.

[46] Tabata T, Aubin J, Huet K, et al. Impact of solidification velocity on activation of Ga, In, Al segregated in high Ge content SiGe by UV melt laser anneal [C]2019 Electron Devices Technology Manufacturing Conference (EDTM), 2019: 130132.

[47] Toshiyuki Tabata, Joris Aubin, Karim Huet, et al. Segregation and activation of Ga in high Ge content SiGe by UV melt laser anneal. Journal of Applied Physics, 125, 215702(2019).

[48] Everaert J L, Schaekers M, Yu H, et al. Sub10−9 Ω·cm2 contact resistivity on pSiGe achieved by Ga doping nanosecond laser activation [C]2017 Symposium on VLSI Technology, 2017: T214T215.

[49] H Yu, L L Wang, M Schaekers, et al. Lanthanum and lanthanum silicide contacts on N-type silicon. IEEE Electron Device Letters, 38, 843-846(2017).

[50] H Yu, M Schaekers, T Schram, et al. Multiring circular transmission line model for ultralow contact resistivity extraction. IEEE Electron Device Letters, 36, 600-602(2015).

[51] C I Li, N Breil, T Y Wen, et al. p-type MOSFET contact resistance improvement by conformal plasma doping and nanosecond laser annealing. IEEE Electron Device Letters, 40, 307-309(2019).

[52] van Dal M J H, Vellianitis G, Donbos G, et al. Ge CMOS gate stack contact development f Vertically Stacked Lateral Nanowire FETs[C]2018 IEEE International Electron Devices Meeting (IEDM), 2018: 21.1.121.1.4.

[53] Z Wang, N Mingo. Diameter dependence of SiGe nanowire thermal conductivity. Applied Physics Letters, 97, 101903(2010).

[54] Natalio Mingo, Liu Yang, Deyu Li, et al. Predicting the thermal conductivity of Si and Ge nanowires. Nano Letters, 3, 1713-1716(2003).

[55] Hung R, Khaja F A, Hollar K E, et al. Novel solutions to enable contact resistivity 1E9 Ωcm2 f 5 nm node beyond [C]2018 International Symposium on VLSI Technology, Systems Application (VLSITSA), 2018: 12.

[56] Lee R T P, Petrov N, Kassim J, et al. Nanosecond laser anneal f BEOL perfmance boost in advanced FinFETs[C]2018 IEEE Symposium on VLSI Technology, 2018: 6162.

[57] Batude P, FenouilletBeranger C, Pasini L, et al. 3 DVLSI with CoolCube process: An alternative path to scaling [C]2015 Symposium on VLSI Technology (VLSI Technology), 2015: T48T49.

[58] FenouilletBeranger C, Batude P, Bru L, et al. Recent advances in 3D VLSI integration [C]2016 International Conference on IC Design Technology (ICICDT), 2016: 14.

[59] Bosch D, Alba P A, Kerdiles S, et al. Laser processing f 3D junctionless transist fabrication [C]2019 IEEE SOI3DSubthreshold Microelectronics Technology Unified Conference (S3S), 2019: 13.

[60] J Derakhshandeh, Mofrad M R Tajari, R Ishihara, et al. A study of the CMP effect on the quality of thin silicon films crystallized by using the μ-Czochralski process. Journal of the Korean Physical Society, 432-436(2009).

[61] R Ishihara, der Wilt P C van, Dijk B D van, et al. Location-control of large grains by μ-czochralski (grain filter) process and its application to single-crystalline silicon thin-film transistors. Thin Solid Films, 427, 77-85(2003).

[62] Lisoni J G, Arreghini A, Congedo G, et al. Laser thermal anneal of polysilicon channel to boost 3D memy perfmance [C]2014 Symposium on VLSI Technology (VLSITechnology): Digest of Technical Papers, 2014: 12.

[63] K Huet, C Boniface, R Negru, et al. Ultra low thermal budget anneals for 3D memories: Access device formation. AIP Conference Proceedings, 1496, 135-138(2012).

[64] Congedo G, Arreghini A, Liu L, et al. Analysis of perfmancevariability tradeoff in Macaronitype 3D N memy [C]2014 IEEE 6th International Memy Wkshop (IMW), 2014: 14.

[65] Magna Antonino La, Paola Alippi, Vittorio Privitera, et al. A phase-field approach to the simulation of the excimer laser annealing process in Si. Journal of Applied Physics, 95, 4806-4814(2004).

[66] G Fortunato, L Mariucci, M Stanizzi, et al. Ultra-shallow junction formation by excimer laser annealing and low energy (<1 keV) B implantation: A two-dimensional analysis. Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, 186, 401-408(2002).

[67] Y F Chong, K L Pey, A T S Wee, et al. Annealing of ultrashallow p+/n junction by 248 nm excimer laser and rapid thermal processing with different preamorphization depths. Applied Physics Letters, 76, 3197-3199(2000).

[68] Seungloo Do, Seong Kong, Yonglyun Lee, et al. Ultra-shallow junction formation using plasma doping and excimer laser annealing for nano-technology CMOS applications. Journal of the Korean Physical Society, 55, 1065-1069(2009).

[69] Aid S R, Rashid N N M, Jonny N F A, et al. Preliminary study on laser annealed NP Junction in phosphus implanted germanium [C]2020 IEEE International Conference on Semiconduct Electronics (ICSE). IEEE, 2020: 152155.

[70] Tabata T, Raynal P E, Huet K, et al. Segregation activation of Sb implanted in Si by UV nanosecondlaserannealinduced nonequilibrium solidification[J]. Journal of Applied Physics, 2020, 127(13): 135701.

[71] Seong-Dong Kim, Cheol-Min Park, J C S Woo. Advanced source/drain engineering for box-shaped ultrashallow junction formation using laser annealing and pre-amorphization implantation in sub-100-nm SOI CMOS. IEEE Transactions on Electron Devices, 49, 1748-1754(2002).

[72] N Chery, M Zhang, R Monflier, et al. Study of recrystallization and activation processes in thin and highly doped silicon-on-insulator layers by nanosecond laser thermal annealing. Journal of Applied Physics, 131, 65301(2022).

[73] Bl J, Qin S, Oesterlin P, et al. High mobility Gechannel fmation by localizedive liquid phase epitaxy (LPE) using Ge+B plasma ion implantation laser melt annealing [C]2013 13th International Wkshop on Junction Technology (IWJT), 2013: 4953.

[74] C Y Ong, K L Pey, X Li, et al. Laser annealing induced high Ge concentration epitaxial SiGe layer in Si_1−xGe_x virtual substrate. Applied Physics Letters, 93, 41112(2008).

[75] L Dagault, P Acosta-Alba, S Kerdiles, et al. Impact of UV nanosecond laser annealing on composition and strain of undoped Si_0.8Ge_0.2 epitaxial layers. ECS Journal of Solid State Science and Technology, 8, 202-208(2019).

[76] I Karmous, F Rozé, P E Raynal, et al. Non-equilibrium growth of surface wrinkles emerging in an SiO₂/Si stack during Si melting induced by UV nanosecond pulsed laser annealing. ECS Journal of Solid State Science and Technology, 11, 104006(2022).

[77] FenouilletBeranger C, AcostaAlba P, Mathieu B, et al. Ns laser annealing f junction activation preserving intertier interconnections stability within a 3D sequential integration [C]2016 IEEE SOI3DSubthreshold Microelectronics Technology Unified Conference (S3S), 2016: 12.

[78] Jourdan N, Roze F, Tabata T, et al. UV nanosecond laser annealing f Ru interconnects [C]2020 IEEE International Interconnect Technology Conference (IITC), 2020: 163165.

[79] Usami Y, Imokawa K, Nohdomi R, et al. Change in resistivity of fine metal line by KrF excimer laser annealing [C]2022 IEEE International Interconnect Technology Conference (IITC), 2022: 108110.

[80] Rajendran B, Jain S H, Kramer T A, et al. Thermal simulation of laser annealing f 3D integration [C]Proceedings VMIC, 2003: 16.

[81] Voen A, Wu Z, Parihar N, et al. 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal strained silicon as perfmance boosters [C]2020 IEEE Symposium on VLSI Technology, 2020: 12.

[82] FenouilletBeranger C, Mathieu B, Previtali B, et al. New insights on bottom layer thermal stability laser annealing promises f high perfmance 3D VLSI [C]2014 IEEE International Electron Devices Meeting, 2014: 2527.

[83] Cavalcante C, FenouilletBeranger C, Batude P, et al. 28 nm FDSOI CMOS technology (FEOL BEOL) thermal stability f 3D sequential integration: yield reliability analysis [C]2020 IEEE Symposium on VLSI Technology, 2020: 12.

[84] Lisoni J G, Arreghini A, Congedo G, et al. Laser thermal annealneal of polysilicon channel to boost 3D memy perfmance [C]2014 Symposium on VLSI Technology (VLSITechnology): Digest of Technical Papers, 2014: 12.

[85] Congedo G, Arreghini A, Liu L, et al. Analysis of perfmancevariability tradeoff in Macaronitype 3D N memy [C]2014 IEEE 6th International Memy Wkshop (IMW), 2014: 14.