• Microelectronics
  • Vol. 53, Issue 3, 366 (2023)
GE Binjie1,2, LI Yan1, YU Hang1, MA Siguang3, and XIE Qingguo4,5
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
  • 4[in Chinese]
  • 5[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.220168 Cite this Article
    GE Binjie, LI Yan, YU Hang, MA Siguang, XIE Qingguo. An Asynchronous SAR ADC with Extended Sampling Time[J]. Microelectronics, 2023, 53(3): 366 Copy Citation Text show less
    References

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    [2] CHEN S W, BRODERSEN R. A 6-bit 600-ms/s 53-mw asynchronous adc in 013-μm CMOS [J] IEEE J Solid State Circuits, 2006, 41(12): 2669-2680.

    [5] LI W T, LI F L, WANG Z H. High-resolution and high-speed integrated CMOS AD converters for low-power applications [M]. Berlin, Springer: 2018.

    [6] RAZAVI B. The bootstrapped switch [a circuit for all seasons] [J]. IEEE Solid-State Circuits Magazine, 2015, 7(3): 12-15.

    [7] LIU C C, CHANG S J, HUANG G Y, et al. A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure [J]. IEEE J Solid-State Circuits, 2010, 45(4): 731-737.

    [9] XU H D, HUANG H, CAI Y D, et al. A 785-dB SNDR radiation-and metastability-tolerant two-step split SAR ADC operating up to 75 MS/s with 249-mW power consumption in 65-nm CMOS [J] IEEE J Solid-State Circuits, 2019, 54(2): 441-451.

    [10] SHEN J, SHIKATA A, FERNANDO L, et al. A 16-bit 16-MS/s SAR ADC with on-chip calibration in 55-nm CMOS [J]. IEEE J Solid-State Circuits, 2018, 53(4): 1149-1160.