Design of special processor for wireless fuse solid target video frequency echo simulator based on FPGA

[in Chinese]; [in Chinese]; [in Chinese]

Journals >Infrared and Laser Engineering >Volume 34 >Issue 3 >Page 360 > Article

Infrared and Laser Engineering
Vol. 34, Issue 3, 360 (2005)

Design of special processor for wireless fuse solid target video frequency echo simulator based on FPGA

[in Chinese]^*, [in Chinese], and [in Chinese]

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[in Chinese]

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DOI: Cite this Article

[in Chinese], [in Chinese], [in Chinese]. Design of special processor for wireless fuse solid target video frequency echo simulator based on FPGA[J]. Infrared and Laser Engineering, 2005, 34(3): 360 Copy Citation Text

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References

[2] Xilinx Inc. Virtex-Ⅱ Platform FPGA User Guid]e[M].American:Xilinx Company,2003.

[3] Xilinx Inc. A CPLD VHDL Introduction[M].American:Xilinx Company,2003.

[5] Altera Inc. Sdrsdram Controller White Paper[M].American:Altera Company ,2003.

[8] Xilinx Inc.Virtex-Ⅱ 1.5V Field-Programmable Gate Arrays[M].American: Xilinx Company,2002.

CLP Journals

[1] [in Chinese], [in Chinese], [in Chinese]. Realization of the code correlation of the simulated echo for the pseudorandom phase-coded PD fuze[J]. Infrared and Laser Engineering, 2007, 36(6): 954

[in Chinese], [in Chinese], [in Chinese]. Design of special processor for wireless fuse solid target video frequency echo simulator based on FPGA[J]. Infrared and Laser Engineering, 2005, 34(3): 360

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