25 &#215; 50 Gbps wavelength division multiplexing silicon photonics receiver chip based on a silicon nanowire-arrayed waveguide grating

Zhi Liu; Jiashun Zhang; Xiuli Li; Liangliang Wang; Jianguang Li; Chunlai Xue; Junming An; Buwen Cheng

doi:10.1364/PRJ.7.000659

Journals >Photonics Research >Volume 7 >Issue 6 >Page 659 > Article

Photonics Research
Vol. 7, Issue 6, 659 (2019)

25 × 50 Gbps wavelength division multiplexing silicon photonics receiver chip based on a silicon nanowire-arrayed waveguide grating

Zhi Liu^1、2, Jiashun Zhang¹, Xiuli Li^1、2, Liangliang Wang¹, Jianguang Li¹, Chunlai Xue^1、2, Junming An^1、2, and Buwen Cheng^1、2、*

Author Affiliations

¹State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

²Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China

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DOI: 10.1364/PRJ.7.000659 Cite this Article Set citation alerts

Zhi Liu, Jiashun Zhang, Xiuli Li, Liangliang Wang, Jianguang Li, Chunlai Xue, Junming An, Buwen Cheng. 25 × 50 Gbps wavelength division multiplexing silicon photonics receiver chip based on a silicon nanowire-arrayed waveguide grating[J]. Photonics Research, 2019, 7(6): 659 Copy Citation Text

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