[2] NAKAI M, AKUI S, SENO K, et al. Dynamic voltage and frequency management for a low-power embedded microprocessor [J]. IEEE J Sol Sta Circ, 2005, 40(1): 28-35.
[3] CHAU V, CHEN X, FONG K C K, et al. Flow shop for dual CPUs in dynamic voltage scaling [J]. Theo Comput Sci, 2020, 819: 24-34.
[4] CALDWELL T, ALLDRED D, LI Z. A reconfigurable ΔΣ ADC with up to 100 MHz bandwidth using flash reference shuffling [J]. IEEE Trans Circ Syst I: Regu Pap, 2014, 61(8): 2263-2271.
[10] TAMADDON M, YAVARI M. High-performance time-based continuous-time sigma-delta modulators using single-opamp resonator and noise-shaped quantizer [J]. Microelec J, 2016, 56: 110-121.
[11] SAHU A K, CHANDRA V K, SINHA G R. A 6.7 mW 8-bit power optimzed sigma-delta ADC as DUT for built-in-self-test in 45 nm CMOS [J]. Program Dev Circ Syst, 2016, 8(3): 61-66.