Wei Wang, Ruifeng Zhang. High resolution digital-to-time converter based on FPGA[J]. High Power Laser and Particle Beams, 2023, 35(3): 035006
- High Power Laser and Particle Beams
- Vol. 35, Issue 3, 035006 (2023)
Fig. 1. Timing diagram of the vernier DTC
Fig. 2. Timing diagrams when β 1≥β 2
Fig. 3. Timing diagrams when β 1 ＜β 2
Fig. 4. Simplified block diagram of the vernier DTC
Fig. 5. Circuit schematic of the phase coincidence detector
Fig. 6. Schematic of the pulse generator when β 1≥β 2
Fig. 7. Schematic of the pulse generator when β 1 ＜β 2
Fig. 8. Schematic of MMCM
Fig. 9. Simulation results of different sizes of β 1 and β 2
Fig. 10. DNL and INL of the first pulse signal
Fig. 11. DNL and INL of the second pulse signal
Fig. 12. Temperature sensitivity of the DTC
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