• Acta Optica Sinica
  • Vol. 41, Issue 18, 1822001 (2021)
Zuoda Zhou1,2,3, Dihu Chen1,2,3,*, Meina Lu1,3, Wei Jin1,3..., Lai Wei1,2,3, Wentao Wang1,2,3, Maoxin Song1,2,3 and Jin Hong1,2,3|Show fewer author(s)
Author Affiliations
  • 1Anhui Institute of Optics and Fine Mechanics, Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei, Anhui 230031, China
  • 2University of Science and Technology of China, Hefei, Anhui 230026, China
  • 3Key Laboratory of Optical Calibration and Characterization, Chinese Academy of Sciences, Hefei, Anhui 230031, China
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    DOI: 10.3788/AOS202141.1822001 Cite this Article Set citation alerts
    Zuoda Zhou, Dihu Chen, Meina Lu, Wei Jin, Lai Wei, Wentao Wang, Maoxin Song, Jin Hong. Overclocking Readout Design of Focusing and Leveling Linear Array CCD Imaging System[J]. Acta Optica Sinica, 2021, 41(18): 1822001 Copy Citation Text show less
    Structure of focusing and leveling electronics system
    Fig. 1. Structure of focusing and leveling electronics system
    Structure of S11156-2048 linear array CCD detector
    Fig. 2. Structure of S11156-2048 linear array CCD detector
    Power conversion scheme
    Fig. 3. Power conversion scheme
    Timing drive circuit. (a) SG, P1H and P2H pin drivers; (b) ARG pin drive; (c) RG pin drive; (d) TG pin drive
    Fig. 4. Timing drive circuit. (a) SG, P1H and P2H pin drivers; (b) ARG pin drive; (c) RG pin drive; (d) TG pin drive
    Waveform of detector drive signal
    Fig. 5. Waveform of detector drive signal
    Analog front-end circuit
    Fig. 6. Analog front-end circuit
    Waveform of detector output signal and sampling pulse
    Fig. 7. Waveform of detector output signal and sampling pulse
    Detector drive circuit board
    Fig. 8. Detector drive circuit board
    CCD photoelectric performance test site. (a) Test system; (b) internal structure of darkroom
    Fig. 9. CCD photoelectric performance test site. (a) Test system; (b) internal structure of darkroom
    Signal-to-noise ratio comparison test curves at different readout frequencies. (a) 6.0 MHz; (b) 12.5MHz
    Fig. 10. Signal-to-noise ratio comparison test curves at different readout frequencies. (a) 6.0 MHz; (b) 12.5MHz
    FunctionSymbolTypicalcapacitance /pFVoltage amplitude /VMinimumedge time /nsMaximum drivecurrent /mA
    All reset gateARG1007.02002.8
    Transfer gateTG10015.52062.0
    Horizontal registerP1H/P2H20011.010176.0
    Summing gateSG1011.0108.8
    Reset gateRG1013.0520.8
    Table 1. Drive current of timing drive pin of S11156-2048 detector
    Readout frequency /MHzLAECT
    6.02217220800.999951
    12.51168218140.999974
    Table 2. Charge transfer efficiency at different readout frequencies
    Zuoda Zhou, Dihu Chen, Meina Lu, Wei Jin, Lai Wei, Wentao Wang, Maoxin Song, Jin Hong. Overclocking Readout Design of Focusing and Leveling Linear Array CCD Imaging System[J]. Acta Optica Sinica, 2021, 41(18): 1822001
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