• Infrared and Laser Engineering
  • Vol. 49, Issue 9, 20200312 (2020)
Xianzhi Chen, Zhenbao Luo, Xu Yang, Tao Chen, and Jingtong Zhao
Author Affiliations
  • Southwest Institute of Technical Physics, Chengdu 610041, China
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    DOI: 10.3788/IRLA20200312 Cite this Article
    Xianzhi Chen, Zhenbao Luo, Xu Yang, Tao Chen, Jingtong Zhao. Design of information processing system for photoelectric seeker[J]. Infrared and Laser Engineering, 2020, 49(9): 20200312 Copy Citation Text show less
    Logical composition diagram of a typical photoelectric seeker system
    Fig. 1. Logical composition diagram of a typical photoelectric seeker system
    Logical composition diagram of typical uncooled infrared detection imaging components
    Fig. 2. Logical composition diagram of typical uncooled infrared detection imaging components
    Logical composition diagram of a typical image tracker
    Fig. 3. Logical composition diagram of a typical image tracker
    Typical servo controller logic composition diagram
    Fig. 4. Typical servo controller logic composition diagram
    Logic composition diagram of a typical laser information processor
    Fig. 5. Logic composition diagram of a typical laser information processor
    Logic composition diagram of typical integrated miniaturized information processor
    Fig. 6. Logic composition diagram of typical integrated miniaturized information processor
    PerformanceDevice referenceRemarks
    Computing performance8 TMS320C66x DSP Core Subsystems (C66x CorePacs) 4 ARM® Cortex® -A15 MPCoreTM Processors DSP: 1.2 GHz×8=9.6 GHz ARM: 1.4 GHz×4=5.6 GHz Integer (Instructions) 19600 DMIPS Fixed Point 307.2 GMACS Floating Point 198.4 GFLOPS 66AK2HxxTI DSP DSP+ARM
    Max 3528 DSP Slices 6.3 TeraMACs of DSP compute performance XCKUxxPXILINX FPGA UltraScale+
    Logic timingUp to 1.2M system logic cells Up to 11 CMTs
    Memory8 MB Local L2 Cache 6 MB Multicore Shared Memory (SRAM) On DSP chip
    4 MB Local L2 CacheOn ARM chip
    2 GBytes DDR3 2 Gbits NOR FLASH MT41K512M16 MT25QU02GcBB External extension
    Signal acquisition16 Bits, Up to 500 kSPS, 8 channels, ±20.48 V maximumADAS3023
    Interface expansionCameraLink, PAL, RS422, CAN Standard interface and PWM GPIO control signals DSP, ARM & FPGA
    ConsumptionInput:+5V, consumption about 30 WWith heat dissipation
    SizeLess than ø150 mm
    WeightLess than 500 gContains structural parts
    Table 1.

    Feature summary of integrated miniaturized information processor

    集成小型化信息处理机设计指标

    Xianzhi Chen, Zhenbao Luo, Xu Yang, Tao Chen, Jingtong Zhao. Design of information processing system for photoelectric seeker[J]. Infrared and Laser Engineering, 2020, 49(9): 20200312
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