• Microelectronics
  • Vol. 51, Issue 1, 28 (2021)
CHENG Songlin, XIANG Qianyin*, and FENG Quanyuan
Author Affiliations
  • [in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.200049 Cite this Article
    CHENG Songlin, XIANG Qianyin, FENG Quanyuan. A Level Shifter for Half-Bridge GaN Driver[J]. Microelectronics, 2021, 51(1): 28 Copy Citation Text show less
    References

    [1] CHEN Y P, MA D B. An 8.3 MHz GaN power converter using Markov continuous RSSM for 35 dBμV conducted EMI attenuation and one-cycleTON rebalancing for 27.6 dB VO jittering suppression [C] // IEEE ISSCC. San Francisco, CA, USA. 2019: 250-252.

    [2] MA Y S, LIN Z Y, LIN Y T, et al. A digital-type GaN driver with current-pulse-balancer technique achieving sub-nanosecond current pulse width for high-resolution and dynamic effective range LiDAR system [C] // IEEE ISSCC. San Francisco, CA, USA. 2019: 466-468.

    [3] SEIDEL A, WICHT B. A 1.3 A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11 nC enabled by high-voltage energy storing [C] // IEEE ISSCC. San Francisco, CA, USA. 2017: 432-433.

    [4] KE X G, SANKMAN J, CHEN Y P, et al. A tri-slope gate driving GaN DC-DC converter with spurious noise compression and ringing suppression for automotive applications [J]. IEEE J Sol Sta Circ, 2018, 53(1): 247-260.

    [8] KE X G, MA D B. A 3-to-40 V VIN 10-to-50 MHz 12 W isolated GaN driver with self-excited tdead minimizer achieving 0.2 ns/0.3 ns tdead, 7.9% minimum duty ratio and 50 V/ns CMTI [C] // IEEE ISSCC. San Francisco, CA, USA. 2018: 386-388.

    [11] LIU D W, HOLLIS S J, STARK B H. A New design technique for sub-nanosecond delay and 200 V/ns power supply slew-tolerant floating voltage level shifters for GaN SMPS [J]. IEEE Trans Circ Syst I: Reg Pap, 2019, 66(3): 1280-1290.

    [12] LIU D W, HOLLIS S J, DYMOND H C P, et al. Design of 370-ps delay floating-voltage level shifters with 30-V/ns power supply slew tolerance [J]. IEEE Trans Circ Syst II: Expr Bri, 2016, 63(7): 688-692.

    CLP Journals

    [1] CHENG Han, YE Yidie, PAN Chunbiao, XI Zhenghui. An Adaptive Dead Time Control Circuit for GaN Gate Drive[J]. Microelectronics, 2022, 52(5): 764

    CHENG Songlin, XIANG Qianyin, FENG Quanyuan. A Level Shifter for Half-Bridge GaN Driver[J]. Microelectronics, 2021, 51(1): 28
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