[2] R. Ramakrishnan. CAP and cloud data management. Computer, 45, 43-49(2012).
[4] . Introducing LRDIMM—a new class of memory modules.
[5] E. Prete, D. Scheideler, A. Sanders. A 100 mW 9.6 Gb/s transceiver in 90 nm CMOS for next-generation memory interfaces. IEEE International Solid-State Circuits Conference (ISSCC 2006). Digest of Technical Papers, 253-262(2006).
[6] Z. Gu, P. Gregorius, D. Kehrer, L. Neumann, E. Neuscheler, T. Rickes, H. Ruckerbauer, R. Schledz, M. Streibl, J. Zielbauer. Cascading techniques for a high-speed memory interface. IEEE International Solid-State Circuits Conference (ISSCC 2007). Digest of Technical Papers, 234-599(2007).
[7] H. Partovi, W. Walthes, L. Ravezzi, P. Lindt, S. Chokkalingam, K. Gopalakrishnan, A. Blum, O. Schumacher, C. Andreotti, M. Bruennert, B. Celli-Urbani, D. Friebe, I. Koren, M. Verbeck, U. Lange. Data recovery and retiming for the fully buffered DIMM 4.8 Gb/s serial links. IEEE International Solid-State Circuits Conference (ISSCC 2006). Digest of Technical Papers, 1314-1323(2006).
[17] C. W. Holzwarth, J. S. Orcutt, H. Li, M. A. Popovic, V. Stojanovic, J. L. Hoyt, R. J. Ram, H. I. Smith. Localized substrate removal technique enabling strong-confinement microphotonics in bulk Si CMOS processes. Conference on Lasers and Electro-Optics/Quantum Electronics and Laser Science Conference and Photonic Applications Systems Technologies, CThKK5(2008).
[18] H.-C. Ji, K. H. Ha, K. W. Na, S. G. Kim, I. S. Joe, D. J. Shin, K.-H. Lee, S. D. Suh, J. K. Bok, Y. S. You, Y. W. Hyung, S. S. Kim, Y. D. Park, C. H. Chung. Bulk silicon photonic wire for one-chip integrated optical interconnection. 7th IEEE International Conference on Group IV Photonics (GFP), 96-98(2010).
[20] D. J. Shin, K. S. Cho, H. C. Ji, B. S. Lee, S. G. Kim, J. K. Bok, S. H. Choi, Y. H. Shin, J. H. Kim, S. Y. Lee, K. Y. Cho, B. J. Kuh, J. H. Shin, J. S. Lim, J. M. Kim, H. M. Choi, K. H. Ha, Y. D. Park, C. H. Chung. Integration of Si photonics into DRAM process. Optical Fiber Communication Conference/National Fiber Optic Engineers Conference, OTu2C.4(2013).
[21] H.-C. Ji, K. H. Ha, I. S. Joe, S. G. Kim, K. W. Na, D. J. Shin, S. D. Suh, Y. D. Park, C. H. Chung. Optical interface platform for DRAM integration. Optical Fiber Communication Conference and Exposition, and the National Fiber Optic Engineers Conference (OFC/NFOEC), 1-3(2011).
[23] J. Shin, B. Kuh, J. Lim, B. Kim, E. Lee, D. Shin, K. Cho, B. Lee, K. Ha, H. Choi, G.-H. Choi, H. Kang, E. Jung. Epitaxial growth technology for optical interconnect based on bulk-Si platform. IEEE 10th International Conference on Group IV Photonics (GFP), 3-4(2013).
[24] D. J. Shin, K.-H. Lee, H.-C. Ji, K. W. Na, S. G. Kim, J. K. Bok, Y. S. You, S. S. Kim, I. S. Joe, S. D. Suh, J. Pyo, Y. H. Shin, K. H. Ha, Y. D. Park, C. H. Chung. Mach–Zehnder silicon modulator on bulk silicon substrate: toward DRAM optical interface. 7th IEEE International Conference on Group IV Photonics (GFP), 210-212(2010).
[25] K. Lee, D. J. Shin, H. Ji, K. W. Na, S. G. Kim, J. K. Bok, Y. S. You, S. S. Kim, I. S. Joe, S. D. Suh, J. H. Pyo, Y. H. Shin, K. H. Ha, Y. D. Park, C. H. Chung. 10 Gb/s silicon modulator based on bulk-silicon platform for DRAM optical interface. Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 1-3(2011).
[27] H.-C. Ji, K. Cho, B. Lee, K. Cho, S. Choi, J. Kim, Y. Shin, S.-G. Kim, S. Lee, H. Byun, S. Parmar, A. Nejadmalayeri, D. Kim, J. Bok, Y. Park, D. Shin, I.-S. Joe, B. Kuh, B. Kim, K. Kim, H. Choi, K. Ha. Box-less waveguide Ge PD for bulk-Si based silicon photonic platform. Optical Fiber Communication Conference/National Fiber Optic Engineers Conference.
[28] B. S. Lee, K. S. Cho, Y. H. Shin, J. H. Kim, J. K. Bok, S. G. Kim, D. J. Shin, S. Y. Lee, S. H. Choi, H. C. Ji, K. Y. Cho, H. I. Byun, I. S. Joe, B. J. Kuh, A. Nejadmalayeri, P. Sunil, J. H. Shin, J. S. Lim, B. S. Kim, H. M. Choi, K. H. Ha, G. T. Jeong, G. Y. Jin, E. S. Jung. Integration of photonic circuits with electronics on bulk-Si platform. IEEE 10th International Conference on Group IV Photonics (GFP), 1-2(2013).
[29] J. Pyo, D. J. Shin, K. Lee, H. Ji, K. W. Na, K. S. Cho, S. G. Kim, I. S. Joe, S. D. Suh, Y. H. Shin, Y. Choi, S. Y. Hong, H. I. Byun, B. S. Lee, K. H. Ha, Y. D. Park, C. H. Chung. 10 Gb/s, 1 × 4 optical link for DRAM interconnect. 8th IEEE International Conference on Group IV Photonics (GFP), 368-370(2011).
[30] H. Byun, I. Joe, S. Kim, K. Lee, S. Hong, H. Ji, J. Pyo, K. Cho, S. Kim, S. Suh, Y. Shin, S. Choi, J. Kim, S. Han, B. Lee, K. Na, D. Shin, K. Ha, Y. Park, K. Kim, J. Choi, T. Jeong, S. Hyun, J. Kim, H. Yoon, J. Nam, H. Kwon, H. Lee, J.-H. Choi, J. Choi, C. Chung. FPGA-based DDR3 DRAM interface using bulk-Si optical interconnects. IEEE 10th International Conference on Group IV Photonics (GFP), 5-6(2013).