The Vertical Double-diffused Metal Oxide Semiconductor(VDMOS) device is one that uses multiple carriers, which bears the characteristics of fast switching speed, small switching loss,high input impedance, high operating frequency and good thermal stability. This paper proposes a design and manufacturing method of a 60 V planar gate VDMOS device. In the process of device design, a new structural scheme is proposed. By reducing the lithography of a terminal ring layer(Guard Ring Layer), the terminal structure and the active area structure are combined on one lithography. And a new passivation structure is designed to improve the terminal voltage in the terminal process. The Polyimide(PI) passivation process is utilized instead of the traditional nitride silicon passivation layer. The test results show that the product meets the design requirements. The design scheme of the new structure proposed in this paper is intended to provide a new design idea for the chip design of other specifications.