• Microelectronics
  • Vol. 52, Issue 4, 555 (2022)
SHEN Zesheng1, LIU Yuntao1、2, FANG Shuo1、2, and WANG Yun3
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    DOI: 10.13911/j.cnki.1004-3365.210379 Cite this Article
    SHEN Zesheng, LIU Yuntao, FANG Shuo, WANG Yun. A Digital Decimation Filter ofΣ-Δ ADC with Ultra-Low Power and Small Area[J]. Microelectronics, 2022, 52(4): 555 Copy Citation Text show less
    References

    [1] HAYASHI T, INABE Y, UCHIMURA K, et al. A multistage delta-sigma modulator without double integration loop [C]// IEEE ISSCC. Anaheim, CA, USA. l986: 182-183.

    [2] MAULIK P C, CHADHA M S, LEE W L, et al. A 16-bit 250-kHz delta-sigma modulator and decimation filter [J]. IEEE J Sol Sta Circ, 2000, 35(4): 458-467.

    [4] INCE M, AKCAKAYA F, DUNDAR G. A 7.3 μW decimation filter for 15 bit 25 kHz audio ΣΔ modulator [C]// IEEE FTFC. Monaco. 2014: 1-4.

    [6] LIN L, GAO B, GONG M. An area-efficient decimation filter on high resolution sigma delta A/D converter for biomedical signal processing [C]// IEEE AEECA. Dalian, China. 2020: 427-432.

    [7] MORLING R C S, KALE I, MORRIS S J, et al. DSP engine for ultra-low-power audio applications [C]// ISCAS . Bangkok, Thailand. 2003: 357-360.

    [8] EMINAGA Y, COSKUN A, MOSCHOS S A, et al. Low complexity all-pass based polyphase decimation filters for ECG monitoring [C]// 11th PRIME. Glasgow, UK. 2015: 322-325.

    [9] ABED K H, NERURKAR S B. Implementation of a low power decimation filter using 1/3-band IIR filter [C]// IEEE WCNC. New Orleans, LA, USA. 2003: 460-465.

    [10] HOGENAUER E. An economical class of digital filters for decimation and interpolation [J]. IEEE Trans Acoustics, Speech, and Signal Process, 1981, 29(2): 155-162.

    [11] DOLECEK G J, FERNANDEZ VAZQUEZ A. Trigonometrical approach to design a simple wideband comb compensator [J]. AEUE-Int J Elec Commun, 2014, 68(5): 437-447.

    [12] KRUKOWSKI A M, MORLING R C S, KALE I. Quantization effects in the polyphase N-path IIR structure [J]. IEEE Trans Instrum Measur, 2002, 51(6): 1271-1278.

    [13] VALENZUELA R, CONSTANTINIDES A. Digital signal processing schemes for efficient interpolation and decimation [J]. IEE Proceed Circ, Dev, SystCirc, 1984, 130(6): 225-235.

    SHEN Zesheng, LIU Yuntao, FANG Shuo, WANG Yun. A Digital Decimation Filter ofΣ-Δ ADC with Ultra-Low Power and Small Area[J]. Microelectronics, 2022, 52(4): 555
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