Research on Through Silicon Via Process Based on Double-Sided Blind Via Plating

LI Minghao; WANG Junqiang; LI Mengwei

doi:10.13911/j.cnki.1004-3365.200403

Journals >Microelectronics >Volume 51 >Issue 2 >Page 265 > Article

Microelectronics
Vol. 51, Issue 2, 265 (2021)

Research on Through Silicon Via Process Based on Double-Sided Blind Via Plating

LI Minghao^1、2, WANG Junqiang^1、2, and LI Mengwei^1、2、3

Author Affiliations

¹[in Chinese]

²[in Chinese]

³[in Chinese]

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DOI: 10.13911/j.cnki.1004-3365.200403 Cite this Article

LI Minghao, WANG Junqiang, LI Mengwei. Research on Through Silicon Via Process Based on Double-Sided Blind Via Plating[J]. Microelectronics, 2021, 51(2): 265 Copy Citation Text

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References

[7] HONG S C, LEE W G, KIM W J, et al. Reduction of defects in TSV filled with Cu by high-speed 3-step PPR for 3D Si chip stacking ［J］. Microelec Reliab, 2011, 51(12): 2228-2235.

[13] SEN T, MISHR A S, SHIMPI N G. Synthesis and sensing applications of polyaniline nanocomposites: a review ［J］. RSC Advan, 2016, 6(48): 42196-42222.

[14] JANG D M, RYU C, LEE K Y, et al. Development and evaluation of 3-D SiP with vertically interconnected through silicon via (TSV) ［C］ ∥ 57th IEEE ECTC. Reno, NV, USA. 2007: 847-852.

LI Minghao, WANG Junqiang, LI Mengwei. Research on Through Silicon Via Process Based on Double-Sided Blind Via Plating[J]. Microelectronics, 2021, 51(2): 265

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