A symmetrical SPDT switch working at 28 GHz was designed in a 55 nm CMOS process. The series-parallel structure was used to realize high isolation. The LC impedance matching was carried out by the switch inductor composed of MOS transistor and inductor, so as to achieve low insertion loss and small chip area. The body-floating technology was used to improve the insertion loss and linearity. The simulation results showed that the insertion loss of the SPDT switch was less than 1.7 dB, the isolation was more than 30 dB, the return loss of the input and output was less than -20 dB, and the input 1dB compression point was 12 dBm. The chip size was 240 μm ×180 μm.