• Chinese Optics Letters
  • Vol. 21, Issue 1, 011301 (2023)
Han Ye1、2、*, Qin Han1、2、3, Shuai Wang1, Feng Xiao1、4, Fan Xiao1、4, Yimiao Chu1、4, and Liyan Geng1
Author Affiliations
  • 1State Key Laboratory of Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 2Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 3School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 4College of Materials Science and Optoelectronic Technology, University of Chinese Academy of Sciences, Beijing 100049, China
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    DOI: 10.3788/COL202321.011301 Cite this Article Set citation alerts
    Han Ye, Qin Han, Shuai Wang, Feng Xiao, Fan Xiao, Yimiao Chu, Liyan Geng. Fabrication and photo-response of monolithic 90° hybrid-photodetector array chip for QPSK detection[J]. Chinese Optics Letters, 2023, 21(1): 011301 Copy Citation Text show less

    Abstract

    A quadrature phase-shift keying (QPSK) coherent photodetector chip consisting of a 4×4 multimode interference 90° optical hybrid and a four-channel evanescent photodetector array is designed and fabricated with its photo-response in the L-band characterized. The metal organic chemical vapor deposition regrowth method is adopted to realize active–passive monolithic integration. The chip exhibits a low dark current below 100 nA for each photodetector in the array, a low excess loss of 0.85 dB, a common mode ratio rejection better than 13.6 dB, and a phase deviation within ±10° over the 40 nm wavelength span.

    1. Introduction

    Encouraged by the high-speed data transmission demand of the developing 5G and the upcoming 6G optical communication systems, a big surge in the aggregate data transfer rate in optical networks will be expected in the near future. The coherent optical transmission technology, nowadays standard in the long-haul fiber-optic networks, will be further ameliorated into shorter distance applications such as metropolitan areas, access networks, or even data centers[1,2]. Enabled by the high-order (de)modulation formats scheme targeting both amplitude and phase of the optical carrier, it could conveniently expand data bitrate by-fold without remarkable increase in optic module speed[3]. One of the most popular and widely used formats is quadrature phase-shift keying (QPSK). It utilizes four quadrature phase states to encode 2 bit information into one symbol and doubles the transmission rate accordingly with a higher receiver sensitivity as well. Early researches on transmission link performance and signal processing methods have proven the effectiveness and feasibility of the format[46].

    On the other hand, higher port density and pluggable optical modules in such networks require miniaturization of optical components for less power consumption and optical coupling loss, where integrated devices and modules are obviously a better choice than assembled ones. Many monolithic coherent transceivers have been reported for C-band applications, with low excess loss of 1 dB[7], high responsivity of 70 mA/W[8], and high channel speed[9]. Other novel types of hybrids have also been proposed for compact size and wide operation wavelength ranges[10,11]. We have also recently designed and fabricated an InP-based 90° hybrid for QPSK at the C-band[12] with comparable phase and common mode rejection ratio (CMRR) characteristics.

    In this Letter, a four-channel evanescent photodetector (PD) array is further monolithically integrated to the 90° hybrid with its operation wavelength range adjusted to the wider L-band. The chip is fabricated by the metal organic chemical vapor deposition (MOCVD) regrowth technology, and its photo-response is characterized. The monolithic chip shows a CMRR better than 13.6 dB, a phase deviation within ±10°, and a small excess loss of 0.85 dB over a 40 nm range in the L-band. The PD array also exhibits a low dark current level below 100 nA at 3V.

    2. Device Design

    The monolithic chip consists of a 90° hybrid based on the 4×4 general multimode interference (MMI) structure, an array of four evanescent PDs, and a Mach–Zehnder (MZ) 1×2 MMI power splitter. A typical sandwich deep-ridge waveguide structure is adopted for both the hybrid and the power splitter, with an InP bottom cladding layer of 2.5 µm, an InGaAsP (Q1.065) core layer of 0.5 µm, and an InP top cladding layer of 1.5 µm. The hybrid parameters are summarized in Table 1.

    Input/Output waveguide width2.0 µm
    Waveguide separation5.0 µm
    Taper end width3.6 µm
    Taper length50 µm
    MMI region length810 µm
    MMI region width20 µm

    Table 1. Parameters of the 90° Hybrid

    A taper of linearly varied width is inserted between each input/output waveguide and the MMI region for less phase deviation sensitivity on the MMI region width. The MMI region length is estimated by the self-imaging principle for the four-fold general imaging situation[13]: LMMI=neffWeff2λ0,where neff denotes the effective refractive index of the MMI region; Weff denotes the effective waveguide width, which could be approximated by the actual deep-ridge MMI region width WMMI; λ0 denotes the vacuum center wavelength of the input light. For the L-band center wavelength of 1595 nm, neff is calculated to be 3.194 for an MMI width of 20 µm. Considering a possible fabrication error, WMMI may vary in the range of 20 µm to 20.3 µm, and the estimated MMI region length then ranges from 800.93 µm to 825.21 µm.

    The PD structure layers are designed to be regrown on the MMI core layer to collect optical power by evanescent field coupling to the absorption layer. Details are listed in Table 2. The active area of each PD is 90μm2.

    Material CompositionDoping Type and Density [cm3]Thickness [nm]
    In0.53Ga0.47AsP, 1×101850
    InPP, 2×1017300
    InGaAsP (graded)P, 1×101640
    In0.53Ga0.47As (absorption layer)N, 1×1016560
    InGaAsP (graded)N, 2×101740
    InGaAsP (Q1.065)N, 3×1018500

    Table 2. Parameters of the Evanescent Photodetector

    An MZ 1×2 MMI power splitter is also integrated on chip for phase measurement using only one necessary input source. It first splits the input optical beam into two arms with ideally equal intensity using a 1×2 MMI of symmetrical interference type[14] and then provokes an additional phase difference in one arm by an additional bending delay line relative to a straight one. The two outputs are directly connected to the second and fourth input channels of the hybrid. Parameters of the splitter are listed in Table 3, with the input/output waveguide and taper sizes identical to the hybrid (Table 1).

    MMI region length95 µm
    MMI region width10 µm
    Delay line radius550 µm
    Delay line length difference172.24 µm

    Table 3. Parameters of the 1 × 2 Splitter

    3. Chip Fabrication

    Fabrication of the monolithic chip starts with waveguide layers growth by MOCVD. Then, the top cladding layer in the PD region is removed by chemical etching using hydrochloric and phosphoric acid solutions. The patterned substrate then undergoes a second MOCVD for whole area PD layers growth. Figure 1 illustrates the epitaxial layer structure after regrowth. The PD layers cover the whole hybrid and splitter regions over the top cladding layer, the coupling region with gradually thinning cladding layer, and the core layer at the PD region. Two inductively coupled plasma (ICP) etching steps are conducted successively to define first the p-i-n junction mesa and then the N-contact mesa. The N-contact mesa front edge has extended 8 µm before the junction mesa into the coupling region to prevent high optical coupling loss as previously demonstrated[15]. PD layers elsewhere are redundant and etched out completely in the process. Metallization of contacts are realized by lifting off the Au/Ge/Ni alloy film for the N type and chemically etching the Ti/Au film for the P type, followed by a rapid 1 min thermal annealing at 410°C. A thick 700 nm SiO2 layer has been deposited by the plasma enhanced chemical vapor method before metallization to passivate the PD. After metallization, the hybrid and splitter are deeply etched simultaneously in the same run, during which the PD region is also protected by an extra SiO2 film. Finally, the chip is cleaved at the splitter input waveguide and ready for measurement. Photos of the fabricated chip are shown in Figs. 2 and 3, and the chip has a total size of 5.15mm×1.28mm, in which the splitter length is 2.77 mm.

    Cross-section SEM image of epitaxial layers after regrowth.

    Figure 1.Cross-section SEM image of epitaxial layers after regrowth.

    PD jointed to the hybrid waveguide 3D image.

    Figure 2.PD jointed to the hybrid waveguide 3D image.

    Microscope photo of the fabricated monolithic chip.

    Figure 3.Microscope photo of the fabricated monolithic chip.

    4. Result Discussion

    Measurement of the monolithic chip is conducted on a high-precision test platform using a tunable laser at TE polarization. The dark current of the each PD in the array is measured to be uniformly lower than 100 nA at 3V and 30 nA at 1V, as shown in Fig. 4. The dark current density of the regrown PD is on the same level as our previous monolithic de-multiplexer and PD array chip, where the PDs were grown in the first MOCVD process prior to waveguides[16], which indicates a good regrowth quality in this work. The external PD responsivities of each channel and the total responsivity, which reflects the chip’s photo-electronic conversion efficiency, are measured to the single mode fiber output at the hybrid input and depicted in Fig. 5. The curves present a similar stable tendency with wavelength and remain flat over the whole L-band. However, a responsivity difference could be observed among the channels, which might come from imperfect imaging and unequal optical loss in hybrid output waveguides caused by stain spots on the paths to the PD array during fabrication, as observed in Fig. 3.

    Dark current of the PD array.

    Figure 4.Dark current of the PD array.

    Responsivities and excess loss of the monolithic chip.

    Figure 5.Responsivities and excess loss of the monolithic chip.

    The CMRR represents this imbalance of responsivity and is defined by CMRRI/Q=20log(|I1/2I4/3I1/2+I4/3|),where I1, I4 are used for the I channel and I2, I3 for the Q channel. The measured result is drawn in Fig. 6. Both inputs show a CMRR 5 dB higher for the Q channels than for the I channels due to the responsivity imbalance, but, still, all channels present a CMRR over 13.6 dB in the range of 1585–1625 nm.

    CMRR of the monolithic chip.

    Figure 6.CMRR of the monolithic chip.

    The excess loss of the monolithic chip is estimated. Apart from the 6 dB intrinsic loss of an ideal four-fold imaging for each hybrid input, an excess loss also exists to represent an extra loss of on-chip passive components compared to a straight waveguide, which contains optical scattering loss from but not limited to the imperfect imaging, the waveguide bending, or other kinds of waveguide shapes and sizes. A waveguide-integrated PD (WG-PD) is fabricated on the same wafer, by the same method, in the same process for this estimation. The waveguide length is the same as the total length of the hybrid and the splitter. By deducting the WG-PD external responsivity (blue square in Fig. 5) from the total responsivity (red line in Fig. 5) of the monolithic chip, losses from the fiber end coupling could be eliminated. Consequently, a small excess loss of 0.85 dB is obtained (green diamond in Fig. 5) for almost the entire L-band. We believe that the bending loss of the designed extreme slim 2 µm waveguide and the scattering of the rough MMI sidewall are the main sources of this loss.

    The phase deviation of the monolithic chip could be deduced from the spectral response measurement result with the integrated 1×2 splitter, which is shown in Fig. 7. Periodic-like response enhancements and destructions could be observed for each PD. The spectral distance between neighboring peaks or valleys is defined as the free spectrum range (FSR) and is determined by the delay line length difference ΔL: FSRλ02neffΔL,where neff represents the effective refractive index of the single mode waveguide (3.174 at 1.595 µm). The FSR for all four channels ranges from 4.1 nm to 4.6 nm, corresponding well with the designed value of 4.65 nm.

    Spectral response of the monolithic chip integrated with the splitter.

    Figure 7.Spectral response of the monolithic chip integrated with the splitter.

    Phase distance between channels is calculated by the peak or valley distance in the spectrum: ΔΦij=fp/vifp/vjFSR·(2π),i=1,2,3,4;j=1,2,3,4;ij,where f denotes the frequency at the response peak or valley as the footprints p and v indicate, with i and j for different output channels. Since the standard phase distances for a 4×4 MMI hybrid are ΔΦ12=π/2, ΔΦ13=π/2, ΔΦ14=π, respectively, the calculated phase distance results are further compared to these standard values so that phase deviations are deduced. The estimated phase deviation result is shown in Fig. 8. All channels exhibit a stable deviation over the whole L-band and sustain it well within ±10° over 40 nm from 1585 nm to 1625 nm. Results beyond the L-band are unavailable due to equipment limit. The measured deviation is a little larger than the ±5° state-of-the-art level.

    Phase deviation of the monolithic chip.

    Figure 8.Phase deviation of the monolithic chip.

    Measurement results include both fabrication and measurement errors. For one thing, the inaccurate graphic transfer process may lead to waveguide size distortion, in which width variation is the primary contributor to the larger phase deviation. Supplementary simulations are conducted for phase deviation and excess loss of the hybrid and power splitter, with a 300 nm width increase for waveguides considered. Simulation results by the finite-difference-time-domain propagation method show a phase deviation larger than 5° near 1585 nm in Fig. 9 and an excess loss decreasing from 0.8 dB to 0.05 dB in Fig. 10 for the hybrid at the 40 nm span mentioned above. The 1×2 MMI, however, induces almost no extra phase deviation due to its intrinsic power splitter characteristic, with a stably low excess loss below 0.2 dB for the whole L-band, which contains both losses from the 1×2 MMI and the delay line. Difference between the measured 0.85 dB excess loss and the simulated result should originate from the actual waveguide side wall scattering of optical power in the MMI region.

    Simulated phase deviation with fabrication error.

    Figure 9.Simulated phase deviation with fabrication error.

    Simulated excess loss with fabrication error.

    Figure 10.Simulated excess loss with fabrication error.

    For the other thing, measurement errors will result in an overestimated phase deviation as well, since the phase distance between channels is deduced from peak/valley wavelengths in the spectral response curves. Therefore, any discrepancy of the test laser wavelength will lead to extra calculated phase deviations, which might come from limited equipment accuracy. In this work, ±30pm wavelength repeatability is defined for our laser diode, which corresponds to a possible induced phase deviation increment from 2.35° to 2.63°.

    Provided that the more delicate e-beam lithography and a finer tunable laser for chip fabrication and measurement are to be adopted, a better phase deviation controlled into ±5° could be expected.

    5. Conclusion

    A 90° hybrid monolithic with a PD array is fabricated and characterized in the L-band. The evanescent four-PDs array is monolithically integrated by MOCVD regrowth technology to ensure an intact waveguide epitaxial structure for the passive hybrid, hence a small excess loss of 0.85 dB. Still, the PD array shows a similar dark current density similar to the one without regrowth and a uniform dark current lower than 100 nA at 3V. The monolithic chip also exhibits a stable performance over a wide 40 nm wavelength range from 1585 nm to 1625 nm, with a CMRR higher than 13.6 dB and a phase deviation within ±10°, which could be further decreased by an improved fabrication method and measurement condition.

    The bandwidth of the PD array reaches 15 GHz for each PD unit, which is yet to be promoted for high-speed detection. The primary cause is the relatively low density of 1017cm3 P-type-doped InP electron barrier layer, which generates a large bandgap difference at the absorber boundary to prevent holes from efficient collection by the P contact. An obvious improvement could be expected, as long as a higher dopant density over 1018cm3 and narrower bandgap InGaAsP material is adopted in the MOCVD process[17].

    Despite all that, the integration method in this work still proves feasible for a coherent PD chip, which could conveniently include more passive structures like the MZ splitter. The chip integrated with the MZ splitter could potentially constitute together as the core module in the differential QPSK (DQPSK) receiver, where the delay line is 1 bit long in time to realize self-homodyne photo-detection with no need for local oscillators. Furthermore, the DQPSK receiver could also possibly convert DQPSK signals to 4-ary pulse amplitude modulation (PAM4) ones and hopefully cut down power consumption[18]. Higher level integration of the basic chip structure in this work could be expected to realize more multiplexing dimensions, larger channel number, and higher information transmission rate.

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    Han Ye, Qin Han, Shuai Wang, Feng Xiao, Fan Xiao, Yimiao Chu, Liyan Geng. Fabrication and photo-response of monolithic 90° hybrid-photodetector array chip for QPSK detection[J]. Chinese Optics Letters, 2023, 21(1): 011301
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