A 0.18 μm CMOS process single photon avalanche diode (SPAD) was examined in this study in an effort to inhibit premature edge breakdown (PEB) and secure large photocurrent and low dark count rate (DCR). The SPAD consists of a p-well/deep n-well photosensitive junction and a guard ring as-formed by a deep n-well up-diffused region and an edge STI. The size of the STI layer related to the light current and dark rate was determined via test. The results indicate that the photocurrent and dark count of the SPAD are optimal when the overlapping length between the STI and guard ring is 1 μm at room temperature. The SPAD with 10 μm diameter has high photon detection probability (PDP), wide spectral response, dark count rate as low as 208 Hz, and 20.8% peak PDP when the wavelength is 510 nm. A 0.18 μm CMOS process single photon avalanche diode (SPAD) was examined in this study to inhibit premature edge breakdown (PEB) and secure large photocurrent and low dark count rate (DCR). The SPAD consists of a p-well/deep n-well photosensitive junction and a guard ring as-formed by a deep n-well up-diffused region and an edge STI. The size of the STI layer related to the light current and dark rate was determined via test. The results indicate that the photocurrent and dark count of the SPAD are optimal when the overlapping length between the STI and guard ring is 1 μm at room temperature. The SPAD with 10 μm diameter has high photon detection probability (PDP), wide spectral response, dark count rate as low as 208 Hz, and 208% peak PDP when the wavelength is 510 nm.