• Microelectronics
  • Vol. 53, Issue 3, 518 (2023)
CAI Zhikuang1,2, YANG Hang1, GU Peng1, GUO Jingjing1..., WANG Zixuan1,2 and GUO Yufeng1,2|Show fewer author(s)
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    DOI: 10.13911/j.cnki.1004-3365.220246 Cite this Article
    CAI Zhikuang, YANG Hang, GU Peng, GUO Jingjing, WANG Zixuan, GUO Yufeng. A Two-Dimensional Capacitance Extraction Technology of Interconnects Based on Segment Reservation Method[J]. Microelectronics, 2023, 53(3): 518 Copy Citation Text show less
    References

    [1] YU W J, WANG X R. Advanced field-solver techniques for RC extraction of integrated circuits [M]. Berlin: Springer Press, 2014: 5-34.

    [2] SUMANT P S, CANGELLARIS A C. Algebraic multigrid Laplace solver for the extraction of capacitances of conductors in multilayer dielectrics [J]. International Journal of Numerical Modelling - Electronic Networks Devices & Fields, 2010, 20(5): 253-269.

    [4] ZHAI K Y, YU W J. The 2-D boundary element techniques for capacitance extraction of nanometer VLSI interconnects [J]. International Journal of Numerical Modelling-Electronic Networks Devices & Fields, 2014, 27(4): 656-668.

    [5] LIANG W J, YU W J. A 2-D capacitance solver with finite difference method [C] // 2020 China Semiconductor Technology International Conference (CSTIC). 2020: 1-3.

    [10] SONG M Y, YANG M, YU W J. Floating random walk based capacitance solver for VLSI structures with non-stratified dielectrics [C] // Proceedings of Design Automation & Test in Europe Conference & Exhibition. Los Alamitos, CA, USA. 2020: 1133-1138.

    CAI Zhikuang, YANG Hang, GU Peng, GUO Jingjing, WANG Zixuan, GUO Yufeng. A Two-Dimensional Capacitance Extraction Technology of Interconnects Based on Segment Reservation Method[J]. Microelectronics, 2023, 53(3): 518
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