A physical layer circuit applied to the data interface of display driver chips was proposed based on Mobile Industry Processor Interface （MIPI） protocol. In response to the increasing speed requirements for data transmission and the issue of offset voltage causing the duty cycle of the output signal to deviate by 50%， which affected the accuracy of high-speed sampling， a multi-stage amplifier structure was adopted to achieve high-speed channels and programmable current source was used for adaptive calibration of offset voltage， reducing the error caused by offset voltage in transmission. The circuit was designed using SMIC 110 nm CMOS technology. The results of post simulation showed that adaptive calibration could reduce the input offset voltage of -30 mV~35 mV to -1 mV~1.2 mV， and the transmission rate of single channel could reach 1.5 Gbps， achieving high-speed and high-precision data transmission.